Searched refs:SZ_4K (Results 1 – 5 of 5) sorted by relevance
79 #define SZ_4K 0x1000 macro2340 align_size = (m_sOutPortDef.nBufferSize + (SZ_4K - 1)) & ~(SZ_4K - 1); in use_output_buffer()4243 alloc_data->len = (size + (SZ_4K - 1)) & ~(SZ_4K - 1); in alloc_map_ion_memory()4244 alloc_data->align = SZ_4K; in alloc_map_ion_memory()
61 #define SZ_4K 0x1000 macro566 extradata_info.size = ALIGN(extradata_info.size, SZ_4K); in allocate_extradata()874 m_sOutput_buff_property.alignment = SZ_4K; in venc_open()875 m_sInput_buff_property.alignment = SZ_4K; in venc_open()1119 m_sInput_buff_property.datasize = ALIGN(m_sInput_buff_property.datasize, SZ_4K); in venc_get_buf_req()
117 #define SZ_4K 0x1000 macro1832 drv_ctx.op_buf.alignment=SZ_4K; in component_init()1833 drv_ctx.interm_op_buf.alignment=SZ_4K; in component_init()1834 drv_ctx.ip_buf.alignment=SZ_4K; in component_init()
130 #define SZ_4K 0x1000 macro1536 drv_ctx.op_buf.alignment=SZ_4K; in component_init()1537 drv_ctx.ip_buf.alignment=SZ_4K; in component_init()
121 #define SZ_4K 0x1000 macro1819 drv_ctx.op_buf.alignment=SZ_4K; in component_init()1820 drv_ctx.ip_buf.alignment=SZ_4K; in component_init()