Lines Matching refs:r_dest
77 LIR* ArmMir2Lir::LoadFPConstantValue(int r_dest, int value) { in LoadFPConstantValue() argument
78 DCHECK(RegStorage::IsSingle(r_dest)); in LoadFPConstantValue()
83 NewLIR2(kThumb2Vmovs_IMM8, r_dest, 0); in LoadFPConstantValue()
85 return NewLIR3(kThumb2Vsubs, r_dest, r_dest, r_dest); in LoadFPConstantValue()
89 return NewLIR2(kThumb2Vmovs_IMM8, r_dest, encoded_imm); in LoadFPConstantValue()
98 r_dest, rs_r15pc.GetReg(), 0, 0, 0, data_target); in LoadFPConstantValue()
223 LIR* ArmMir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) { in LoadConstantNoClobber() argument
227 if (r_dest.IsFloat()) { in LoadConstantNoClobber()
228 return LoadFPConstantValue(r_dest.GetReg(), value); in LoadConstantNoClobber()
232 if (r_dest.Low8() && (value >= 0) && (value <= 255)) { in LoadConstantNoClobber()
233 return NewLIR2(kThumbMovImm, r_dest.GetReg(), value); in LoadConstantNoClobber()
238 res = NewLIR2(kThumb2MovI8M, r_dest.GetReg(), mod_imm); in LoadConstantNoClobber()
243 res = NewLIR2(kThumb2MvnI8M, r_dest.GetReg(), mod_imm); in LoadConstantNoClobber()
248 res = NewLIR2(kThumb2MovImm16, r_dest.GetReg(), value); in LoadConstantNoClobber()
252 res = NewLIR2(kThumb2MovImm16, r_dest.GetReg(), Low16Bits(value)); in LoadConstantNoClobber()
253 NewLIR2(kThumb2MovImm16H, r_dest.GetReg(), High16Bits(value)); in LoadConstantNoClobber()
422 LIR* ArmMir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type) { in OpMovRegMem() argument
423 UNUSED(r_dest, r_base, offset, move_type); in OpMovRegMem()
434 LIR* ArmMir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { in OpCondRegReg() argument
435 UNUSED(op, cc, r_dest, r_src); in OpCondRegReg()
440 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegRegShift() argument
443 bool thumb_form = (shift == 0) && r_dest.Low8() && r_src1.Low8() && r_src2.Low8(); in OpRegRegRegShift()
502 return NewLIR4(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift); in OpRegRegRegShift()
505 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); in OpRegRegRegShift()
509 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() argument
510 return OpRegRegRegShift(op, r_dest, r_src1, r_src2, 0); in OpRegRegReg()
513 LIR* ArmMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) { in OpRegRegImm() argument
518 bool all_low_regs = r_dest.Low8() && r_src1.Low8(); in OpRegRegImm()
524 return NewLIR3(kThumbLslRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
526 return NewLIR3(kThumb2LslRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
529 return NewLIR3(kThumbLsrRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
531 return NewLIR3(kThumb2LsrRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
534 return NewLIR3(kThumbAsrRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
536 return NewLIR3(kThumb2AsrRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
538 return NewLIR3(kThumb2RorRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
540 if (r_dest.Low8() && (r_src1 == rs_r13sp) && (value <= 1020) && ((value & 0x3) == 0)) { in OpRegRegImm()
541 return NewLIR3(kThumbAddSpRel, r_dest.GetReg(), r_src1.GetReg(), value >> 2); in OpRegRegImm()
542 } else if (r_dest.Low8() && (r_src1 == rs_r15pc) && in OpRegRegImm()
544 return NewLIR3(kThumbAddPcRel, r_dest.GetReg(), r_src1.GetReg(), value >> 2); in OpRegRegImm()
553 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), abs_value); in OpRegRegImm()
568 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), abs_value); in OpRegRegImm()
604 return NewLIR3(kThumb2BicRRI8M, r_dest.GetReg(), r_src1.GetReg(), mod_imm); in OpRegRegImm()
641 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), mod_imm); in OpRegRegImm()
647 res = NewLIR4(alt_opcode, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg(), 0); in OpRegRegImm()
649 res = NewLIR3(alt_opcode, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg()); in OpRegRegImm()
697 LIR* ArmMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() argument
701 if (r_dest.IsFloat()) { in LoadConstantWide()
702 DCHECK(!r_dest.IsPair()); in LoadConstantWide()
707 NewLIR2(kThumb2Vmovd_IMM8, r_dest.GetReg(), 0); in LoadConstantWide()
709 res = NewLIR3(kThumb2Vsubd, r_dest.GetReg(), r_dest.GetReg(), r_dest.GetReg()); in LoadConstantWide()
713 res = NewLIR2(kThumb2Vmovd_IMM8, r_dest.GetReg(), encoded_imm); in LoadConstantWide()
718 DCHECK(r_dest.IsPair()); in LoadConstantWide()
720 res = LoadConstantNoClobber(r_dest.GetLow(), val_lo); in LoadConstantWide()
721 LoadConstantNoClobber(r_dest.GetHigh(), val_hi); in LoadConstantWide()
731 if (r_dest.IsFloat()) { in LoadConstantWide()
733 r_dest.GetReg(), rs_r15pc.GetReg(), 0, 0, 0, data_target); in LoadConstantWide()
735 DCHECK(r_dest.IsPair()); in LoadConstantWide()
737 r_dest.GetLowReg(), r_dest.GetHighReg(), rs_r15pc.GetReg(), 0, 0, data_target); in LoadConstantWide()
748 LIR* ArmMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed() argument
750 bool all_low_regs = r_base.Low8() && r_index.Low8() && r_dest.Low8(); in LoadBaseIndexed()
756 if (r_dest.IsFloat()) { in LoadBaseIndexed()
757 if (r_dest.IsSingle()) { in LoadBaseIndexed()
762 DCHECK(r_dest.IsDouble()); in LoadBaseIndexed()
783 load = NewLIR3(opcode, r_dest.GetReg(), reg_ptr.GetReg(), 0); in LoadBaseIndexed()
807 load = NewLIR3(opcode, r_dest.GetReg(), r_base.GetReg(), r_index.GetReg()); in LoadBaseIndexed()
809 load = NewLIR4(opcode, r_dest.GetReg(), r_base.GetReg(), r_index.GetReg(), scale); in LoadBaseIndexed()
910 LIR* ArmMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody() argument
916 bool all_low = r_dest.Is32Bit() && r_base.Low8() && r_dest.Low8(); in LoadBaseDispBody()
923 if (r_dest.IsFloat()) { in LoadBaseDispBody()
924 DCHECK(!r_dest.IsPair()); in LoadBaseDispBody()
925 load = LoadStoreUsingInsnWithOffsetImm8Shl2(kThumb2Vldrd, r_base, displacement, r_dest); in LoadBaseDispBody()
927 DCHECK(r_dest.IsPair()); in LoadBaseDispBody()
929 load = LoadStoreUsingInsnWithOffsetImm8Shl2(kThumb2LdrdI8, r_base, displacement, r_dest, in LoadBaseDispBody()
930 r_dest.GetLow()); in LoadBaseDispBody()
939 if (r_dest.IsFloat()) { in LoadBaseDispBody()
940 DCHECK(r_dest.IsSingle()); in LoadBaseDispBody()
941 load = LoadStoreUsingInsnWithOffsetImm8Shl2(kThumb2Vldrs, r_base, displacement, r_dest); in LoadBaseDispBody()
947 if (r_dest.Low8() && (r_base == rs_rARM_PC) && (displacement <= 1020) && in LoadBaseDispBody()
951 } else if (r_dest.Low8() && (r_base == rs_rARM_SP) && (displacement <= 1020) && in LoadBaseDispBody()
991 load = NewLIR3(opcode16, r_dest.GetReg(), r_base.GetReg(), displacement >> scale); in LoadBaseDispBody()
993 load = NewLIR3(opcode32, r_dest.GetReg(), r_base.GetReg(), displacement); in LoadBaseDispBody()
999 if (opcode16 != kThumbBkpt && r_dest.Low8() && in LoadBaseDispBody()
1002 OpRegRegImm(kOpAdd, r_dest, r_base, displacement & ~(0x1f << scale)); in LoadBaseDispBody()
1003 load = NewLIR3(opcode16, r_dest.GetReg(), r_dest.GetReg(), (displacement >> scale) & 0x1f); in LoadBaseDispBody()
1006 OpRegRegImm(kOpAdd, r_dest, r_base, displacement & ~0x00000fff); in LoadBaseDispBody()
1007 load = NewLIR3(opcode32, r_dest.GetReg(), r_dest.GetReg(), displacement & 0x00000fff); in LoadBaseDispBody()
1016 DCHECK(!r_dest.IsFloat()); in LoadBaseDispBody()
1017 load = LoadBaseIndexed(r_base, reg_offset, r_dest, scale, size); in LoadBaseDispBody()
1025 AnnotateDalvikRegAccess(load, displacement >> 2, true /* is_load */, r_dest.Is64Bit()); in LoadBaseDispBody()
1030 LIR* ArmMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() argument
1042 DCHECK(!r_dest.IsFloat()); // See RegClassForFieldLoadSave(). in LoadBaseDisp()
1046 load = NewLIR3(kThumb2Ldrexd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_ptr.GetReg()); in LoadBaseDisp()
1049 load = LoadBaseDispBody(r_base, displacement, r_dest, size); in LoadBaseDisp()
1226 LIR* ArmMir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) { in OpFpRegCopy() argument
1228 DCHECK_EQ(r_dest.IsDouble(), r_src.IsDouble()); in OpFpRegCopy()
1229 if (r_dest.IsDouble()) { in OpFpRegCopy()
1232 if (r_dest.IsSingle()) { in OpFpRegCopy()
1239 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); in OpFpRegCopy()
1240 if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && r_dest == r_src) { in OpFpRegCopy()