Lines Matching refs:Arm64Mir2Lir

26 void Arm64Mir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest,  in GenArithOpFloat()
68 void Arm64Mir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
121 void Arm64Mir2Lir::GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1, in GenMultiplyByConstantFloat()
132 void Arm64Mir2Lir::GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1, in GenMultiplyByConstantDouble()
147 void Arm64Mir2Lir::GenConversion(Instruction::Code opcode, in GenConversion()
229 void Arm64Mir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, in GenFusedFPCmpBranch()
279 void Arm64Mir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, in GenCmpFP()
337 void Arm64Mir2Lir::GenNegFloat(RegLocation rl_dest, RegLocation rl_src) { in GenNegFloat()
345 void Arm64Mir2Lir::GenNegDouble(RegLocation rl_dest, RegLocation rl_src) { in GenNegDouble()
372 bool Arm64Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { in GenInlinedAbsFloat()
391 bool Arm64Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { in GenInlinedAbsDouble()
410 bool Arm64Mir2Lir::GenInlinedSqrt(CallInfo* info) { in GenInlinedSqrt()
420 bool Arm64Mir2Lir::GenInlinedCeil(CallInfo* info) { in GenInlinedCeil()
430 bool Arm64Mir2Lir::GenInlinedFloor(CallInfo* info) { in GenInlinedFloor()
440 bool Arm64Mir2Lir::GenInlinedRint(CallInfo* info) { in GenInlinedRint()
450 bool Arm64Mir2Lir::GenInlinedRound(CallInfo* info, bool is_double) { in GenInlinedRound()
467 bool Arm64Mir2Lir::GenInlinedMinMaxFP(CallInfo* info, bool is_min, bool is_double) { in GenInlinedMinMaxFP()