417                                       RegLocation rl_src, RegLocation rl_dest, int lit) {  in SmallLiteralDivRem()  argument
419   if ((lit < 0) || (lit >= static_cast<int>(arraysize(magic_table)))) {  in SmallLiteralDivRem()
422   DividePattern pattern = magic_table[lit].pattern;  in SmallLiteralDivRem()
432   LoadConstant(r_magic, magic_table[lit].magic32);  in SmallLiteralDivRem()
444                   32 + magic_table[lit].shift);  in SmallLiteralDivRem()
450       OpRegRegImm(kOpAsr, r_long_mul, r_long_mul, magic_table[lit].shift);  in SmallLiteralDivRem()
461                                         RegLocation rl_src, RegLocation rl_dest, int64_t lit) {  in SmallLiteralDivRem64()  argument
463   if ((lit < 0) || (lit >= static_cast<int>(arraysize(magic_table)))) {  in SmallLiteralDivRem64()
466   DividePattern pattern = magic_table[lit].pattern;  in SmallLiteralDivRem64()
480   if (magic_table[lit].magic64_base >= 0) {  in SmallLiteralDivRem64()
484       uint64_t base = DecodeLogicalImmediate(/*is_wide*/true, magic_table[lit].magic64_base);  in SmallLiteralDivRem64()
485       if (magic_table[lit].magic64_eor >= 0) {  in SmallLiteralDivRem64()
486         uint64_t eor = DecodeLogicalImmediate(/*is_wide*/true, magic_table[lit].magic64_eor);  in SmallLiteralDivRem64()
491       DCHECK_EQ(reconstructed_imm, magic_table[lit].magic64) << " for literal " << lit;  in SmallLiteralDivRem64()
495     NewLIR3(WIDE(kA64Orr3Rrl), r_magic.GetReg(), rxzr, magic_table[lit].magic64_base);  in SmallLiteralDivRem64()
496     if (magic_table[lit].magic64_eor >= 0) {  in SmallLiteralDivRem64()
498               magic_table[lit].magic64_eor);  in SmallLiteralDivRem64()
503     LoadConstantWide(r_magic, magic_table[lit].magic64);  in SmallLiteralDivRem64()
512       OpRegRegImm(kOpAsr, r_long_mul, r_long_mul, magic_table[lit].shift);  in SmallLiteralDivRem64()
517       OpRegRegImm(kOpAsr, r_long_mul, r_long_mul, magic_table[lit].shift);  in SmallLiteralDivRem64()
530                                     RegLocation rl_src, RegLocation rl_dest, int lit) {  in HandleEasyDivRem()  argument
531   return HandleEasyDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int>(lit));  in HandleEasyDivRem()
537                                       RegLocation rl_src, RegLocation rl_dest, int64_t lit) {  in HandleEasyDivRem64()  argument
541   if (lit < 2) {  in HandleEasyDivRem64()
544   if (!IsPowerOfTwo(lit)) {  in HandleEasyDivRem64()
546       return SmallLiteralDivRem64(dalvik_opcode, is_div, rl_src, rl_dest, lit);  in HandleEasyDivRem64()
548       return SmallLiteralDivRem(dalvik_opcode, is_div, rl_src, rl_dest, static_cast<int32_t>(lit));  in HandleEasyDivRem64()
551   int k = CTZ(lit);  in HandleEasyDivRem64()
571     if (lit == 2) {  in HandleEasyDivRem64()
581     if (lit == 2) {  in HandleEasyDivRem64()
583       OpRegRegImm64(kOpAnd, t_reg, t_reg, lit - 1);  in HandleEasyDivRem64()
589       OpRegRegImm64(kOpAnd, t_reg2, t_reg2, lit - 1);  in HandleEasyDivRem64()
602 bool Arm64Mir2Lir::EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) {  in EasyMultiply()  argument
603   UNUSED(rl_src, rl_dest, lit);  in EasyMultiply()
608 RegLocation Arm64Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit,  in GenDivRemLit()  argument
610   UNUSED(rl_dest, rl_src1, lit, is_div);  in GenDivRemLit()
615 RegLocation Arm64Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {  in GenDivRemLit()  argument
620   LoadConstant(lit_temp, lit);  in GenDivRemLit()
1001                                                  RegLocation rl_result, int lit ATTRIBUTE_UNUSED,  in GenMultiplyByTwoBitMultiplier()
1089     int64_t lit = mir_graph_->ConstantValueWide(rl_src2);  in GenDivRemLong()  local
1090     if (HandleEasyDivRem64(opcode, is_div, rl_src1, rl_dest, lit)) {  in GenDivRemLong()