28 int32_t Arm64Mir2Lir::EncodeImmSingle(uint32_t bits) {  in EncodeImmSingle()
60 int32_t Arm64Mir2Lir::EncodeImmDouble(uint64_t bits) {  in EncodeImmDouble()
92 size_t Arm64Mir2Lir::GetLoadStoreSize(LIR* lir) {  in GetLoadStoreSize()
101 size_t Arm64Mir2Lir::GetInstructionOffset(LIR* lir) {  in GetInstructionOffset()
112 LIR* Arm64Mir2Lir::LoadFPConstantValue(RegStorage r_dest, int32_t value) {  in LoadFPConstantValue()
136 LIR* Arm64Mir2Lir::LoadFPConstantValueWide(RegStorage r_dest, int64_t value) {  in LoadFPConstantValueWide()
184 int Arm64Mir2Lir::EncodeLogicalImmediate(bool is_wide, uint64_t value) {  in EncodeLogicalImmediate()
311 bool Arm64Mir2Lir::InexpensiveConstantInt(int32_t value ATTRIBUTE_UNUSED) {  in InexpensiveConstantInt()
317 bool Arm64Mir2Lir::InexpensiveConstantFloat(int32_t value) {  in InexpensiveConstantFloat()
321 bool Arm64Mir2Lir::InexpensiveConstantLong(int64_t value) {  in InexpensiveConstantLong()
329 bool Arm64Mir2Lir::InexpensiveConstantDouble(int64_t value) {  in InexpensiveConstantDouble()
336 bool Arm64Mir2Lir::InexpensiveConstantInt(int32_t value, Instruction::Code opcode) {  in InexpensiveConstantInt()
394 LIR* Arm64Mir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) {  in LoadConstantNoClobber()
458 LIR* Arm64Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {  in LoadConstantWide()
539 LIR* Arm64Mir2Lir::OpUnconditionalBranch(LIR* target) {  in OpUnconditionalBranch()
545 LIR* Arm64Mir2Lir::OpCondBranch(ConditionCode cc, LIR* target) {  in OpCondBranch()
552 LIR* Arm64Mir2Lir::OpReg(OpKind op, RegStorage r_dest_src) {  in OpReg()
564 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) {  in OpRegRegShift()
630 LIR* Arm64Mir2Lir::OpRegRegExtend(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,  in OpRegRegExtend()
664 LIR* Arm64Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {  in OpRegReg()
675 LIR* Arm64Mir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset,  in OpMovRegMem()
682 LIR* Arm64Mir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src,  in OpMovMemReg()
689 LIR* Arm64Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) {  in OpCondRegReg()
695 LIR* Arm64Mir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1,  in OpRegRegRegShift()
763 LIR* Arm64Mir2Lir::OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1,  in OpRegRegRegExtend()
801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {  in OpRegRegReg()
805 LIR* Arm64Mir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) {  in OpRegRegImm()
809 LIR* Arm64Mir2Lir::OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value) {  in OpRegRegImm64()
935 LIR* Arm64Mir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) {  in OpRegImm()
939 LIR* Arm64Mir2Lir::OpRegImm64(OpKind op, RegStorage r_dest_src1, int64_t value) {  in OpRegImm64()
1008 int Arm64Mir2Lir::EncodeShift(int shift_type, int amount) {  in EncodeShift()
1014 int Arm64Mir2Lir::EncodeExtend(int extend_type, int amount) {  in EncodeExtend()
1020 bool Arm64Mir2Lir::IsExtendEncoding(int encoded_value) {  in IsExtendEncoding()
1024 LIR* Arm64Mir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest,  in LoadBaseIndexed()
1109 LIR* Arm64Mir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src,  in StoreBaseIndexed()
1191 LIR* Arm64Mir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadBaseDispBody()
1272 LIR* Arm64Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadBaseDisp()
1287 LIR* Arm64Mir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src,  in StoreBaseDispBody()
1362 LIR* Arm64Mir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src,  in StoreBaseDisp()
1384 LIR* Arm64Mir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) {  in OpFpRegCopy()
1390 LIR* Arm64Mir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) {  in OpMem()
1396 LIR* Arm64Mir2Lir::InvokeTrampoline(OpKind op, RegStorage r_tgt,  in InvokeTrampoline()