Lines Matching refs:r_dest
112 LIR* Arm64Mir2Lir::LoadFPConstantValue(RegStorage r_dest, int32_t value) { in LoadFPConstantValue() argument
113 DCHECK(r_dest.IsSingle()); in LoadFPConstantValue()
115 return NewLIR2(kA64Fmov2sw, r_dest.GetReg(), rwzr); in LoadFPConstantValue()
119 return NewLIR2(kA64Fmov2fI, r_dest.GetReg(), encoded_imm); in LoadFPConstantValue()
131 r_dest.GetReg(), 0, 0, 0, 0, data_target); in LoadFPConstantValue()
136 LIR* Arm64Mir2Lir::LoadFPConstantValueWide(RegStorage r_dest, int64_t value) { in LoadFPConstantValueWide() argument
137 DCHECK(r_dest.IsDouble()); in LoadFPConstantValueWide()
139 return NewLIR2(kA64Fmov2Sx, r_dest.GetReg(), rxzr); in LoadFPConstantValueWide()
143 return NewLIR2(WIDE(kA64Fmov2fI), r_dest.GetReg(), encoded_imm); in LoadFPConstantValueWide()
157 r_dest.GetReg(), 0, 0, 0, 0, data_target); in LoadFPConstantValueWide()
394 LIR* Arm64Mir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) { in LoadConstantNoClobber() argument
397 if (r_dest.IsFloat()) { in LoadConstantNoClobber()
398 return LoadFPConstantValue(r_dest, value); in LoadConstantNoClobber()
401 if (r_dest.Is64Bit()) { in LoadConstantNoClobber()
402 return LoadConstantWide(r_dest, value); in LoadConstantNoClobber()
406 DCHECK(!A64_REG_IS_SP(r_dest.GetReg())); in LoadConstantNoClobber()
407 DCHECK(!A64_REG_IS_ZR(r_dest.GetReg())); in LoadConstantNoClobber()
421 res = NewLIR2(opcode, r_dest.GetReg(), rwzr); in LoadConstantNoClobber()
437 res = NewLIR3(kA64Movn3rdM, r_dest.GetReg(), ~useful_bits, shift); in LoadConstantNoClobber()
439 res = NewLIR3(kA64Movz3rdM, r_dest.GetReg(), useful_bits, shift); in LoadConstantNoClobber()
446 res = NewLIR3(kA64Orr3Rrl, r_dest.GetReg(), rwzr, log_imm); in LoadConstantNoClobber()
449 res = NewLIR3(kA64Movz3rdM, r_dest.GetReg(), low_bits, 0); in LoadConstantNoClobber()
450 NewLIR3(kA64Movk3rdM, r_dest.GetReg(), high_bits, 1); in LoadConstantNoClobber()
458 LIR* Arm64Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() argument
459 if (r_dest.IsFloat()) { in LoadConstantWide()
460 return LoadFPConstantValueWide(r_dest, value); in LoadConstantWide()
463 DCHECK(r_dest.Is64Bit()); in LoadConstantWide()
466 DCHECK(!A64_REG_IS_SP(r_dest.GetReg())); in LoadConstantWide()
467 DCHECK(!A64_REG_IS_ZR(r_dest.GetReg())); in LoadConstantWide()
472 return NewLIR2(opcode, r_dest.GetReg(), rxzr); in LoadConstantWide()
485 return NewLIR3(WIDE(kA64Orr3Rrl), r_dest.GetReg(), rxzr, log_imm); in LoadConstantWide()
509 res = NewLIR3(op, r_dest.GetReg(), halfword ^ background, shift); in LoadConstantWide()
518 NewLIR3(WIDE(kA64Movk3rdM), r_dest.GetReg(), halfword, shift); in LoadConstantWide()
534 r_dest.GetReg(), 0, 0, 0, 0, data_target); in LoadConstantWide()
675 LIR* Arm64Mir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, in OpMovRegMem() argument
677 UNUSED(r_dest, r_base, offset, move_type); in OpMovRegMem()
689 LIR* Arm64Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { in OpCondRegReg() argument
690 UNUSED(op, cc, r_dest, r_src); in OpCondRegReg()
695 LIR* Arm64Mir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegRegShift() argument
750 A64Opcode widened_opcode = r_dest.Is64Bit() ? WIDE(opcode) : opcode; in OpRegRegRegShift()
751 CHECK_EQ(r_dest.Is64Bit(), r_src1.Is64Bit()); in OpRegRegRegShift()
752 CHECK_EQ(r_dest.Is64Bit(), r_src2.Is64Bit()); in OpRegRegRegShift()
755 return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift); in OpRegRegRegShift()
759 return NewLIR3(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); in OpRegRegRegShift()
763 LIR* Arm64Mir2Lir::OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegRegExtend() argument
778 A64Opcode widened_opcode = r_dest.Is64Bit() ? WIDE(opcode) : opcode; in OpRegRegRegExtend()
780 if (r_dest.Is64Bit()) { in OpRegRegRegExtend()
797 return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), in OpRegRegRegExtend()
801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() argument
802 return OpRegRegRegShift(op, r_dest, r_src1, r_src2, ENCODE_NO_SHIFT); in OpRegRegReg()
805 LIR* Arm64Mir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) { in OpRegRegImm() argument
806 return OpRegRegImm64(op, r_dest, r_src1, static_cast<int64_t>(value)); in OpRegRegImm()
809 LIR* Arm64Mir2Lir::OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value) { in OpRegRegImm64() argument
816 bool is_wide = r_dest.Is64Bit(); in OpRegRegImm64()
826 return NewLIR4(kA64Ubfm4rrdd | wide, r_dest.GetReg(), r_src1.GetReg(), in OpRegRegImm64()
830 return NewLIR3(kA64Lsr3rrd | wide, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm64()
832 return NewLIR3(kA64Asr3rrd | wide, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm64()
836 return NewLIR4(kA64Extr4rrrd | wide, r_dest.GetReg(), r_src1.GetReg(), r_src1.GetReg(), in OpRegRegImm64()
845 return NewLIR4(opcode | wide, r_dest.GetReg(), r_src1.GetReg(), abs_value, 0); in OpRegRegImm64()
848 return NewLIR4(opcode | wide, r_dest.GetReg(), r_src1.GetReg(), abs_value >> 12, 1); in OpRegRegImm64()
886 return NewLIR3(opcode | wide, r_dest.GetReg(), r_src1.GetReg(), log_imm); in OpRegRegImm64()
895 return NewLIR2(kA64Mov2rr | wide, r_dest.GetReg(), r_src1.GetReg()); in OpRegRegImm64()
899 return NewLIR2(kA64Mov2rr | wide, r_dest.GetReg(), (is_wide) ? rxzr : rwzr); in OpRegRegImm64()
906 return NewLIR2(kA64Mov2rr | wide, r_dest.GetReg(), r_src1.GetReg()); in OpRegRegImm64()
909 return NewLIR2(kA64Mvn2rr | wide, r_dest.GetReg(), r_src1.GetReg()); in OpRegRegImm64()
913 return NewLIR2(kA64Mvn2rr | wide, r_dest.GetReg(), (is_wide) ? rxzr : rwzr); in OpRegRegImm64()
928 res = NewLIR4(alt_opcode | wide, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg(), info); in OpRegRegImm64()
930 res = NewLIR3(alt_opcode | wide, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg()); in OpRegRegImm64()
1024 LIR* Arm64Mir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed() argument
1039 if (r_dest.IsFloat()) { in LoadBaseIndexed()
1040 if (r_dest.IsDouble()) { in LoadBaseIndexed()
1045 DCHECK(r_dest.IsSingle()); in LoadBaseIndexed()
1052 return NewLIR4(opcode, r_dest.GetReg(), r_base.GetReg(), r_index.GetReg(), in LoadBaseIndexed()
1060 r_dest = Check64BitReg(r_dest); in LoadBaseIndexed()
1065 r_dest = As32BitReg(r_dest); in LoadBaseIndexed()
1069 r_dest = Check32BitReg(r_dest); in LoadBaseIndexed()
1074 r_dest = Check32BitReg(r_dest); in LoadBaseIndexed()
1079 r_dest = Check32BitReg(r_dest); in LoadBaseIndexed()
1084 r_dest = Check32BitReg(r_dest); in LoadBaseIndexed()
1088 r_dest = Check32BitReg(r_dest); in LoadBaseIndexed()
1099 load = NewLIR3(opcode, r_dest.GetReg(), r_base.GetReg(), r_index.GetReg()); in LoadBaseIndexed()
1102 load = NewLIR4(opcode, r_dest.GetReg(), r_base.GetReg(), r_index.GetReg(), in LoadBaseIndexed()
1191 LIR* Arm64Mir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody() argument
1202 r_dest = Check64BitReg(r_dest); in LoadBaseDispBody()
1204 if (r_dest.IsFloat()) { in LoadBaseDispBody()
1205 DCHECK(r_dest.IsDouble()); in LoadBaseDispBody()
1214 r_dest = As32BitReg(r_dest); in LoadBaseDispBody()
1218 r_dest = Check32BitReg(r_dest); in LoadBaseDispBody()
1220 if (r_dest.IsFloat()) { in LoadBaseDispBody()
1221 DCHECK(r_dest.IsSingle()); in LoadBaseDispBody()
1249 load = NewLIR3(opcode, r_dest.GetReg(), r_base.GetReg(), scaled_disp); in LoadBaseDispBody()
1252 load = NewLIR3(alt_opcode, r_dest.GetReg(), r_base.GetReg(), displacement); in LoadBaseDispBody()
1259 (size == kReference) ? As64BitReg(r_dest) : r_dest, in LoadBaseDispBody()
1267 AnnotateDalvikRegAccess(load, displacement >> 2, true /* is_load */, r_dest.Is64Bit()); in LoadBaseDispBody()
1272 LIR* Arm64Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() argument
1277 LIR* load = LoadBaseDispBody(r_base, displacement, r_dest, size); in LoadBaseDisp()
1384 LIR* Arm64Mir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) { in OpFpRegCopy() argument
1385 UNUSED(r_dest, r_src); in OpFpRegCopy()