564 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) {  in OpRegRegShift()  argument
566   CHECK_EQ(r_dest_src1.Is64Bit(), r_src2.Is64Bit());  in OpRegRegShift()
591       return NewLIR2(kA64Rev2rr | wide, r_dest_src1.GetReg(), r_src2.GetReg());  in OpRegRegShift()
594       NewLIR2(kA64Rev162rr | wide, r_dest_src1.GetReg(), r_src2.GetReg());  in OpRegRegShift()
601       return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 7);  in OpRegRegShift()
605       return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 15);  in OpRegRegShift()
610       return NewLIR4(kA64Ubfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 15);  in OpRegRegShift()
612       return OpRegRegRegShift(op, r_dest_src1, r_dest_src1, r_src2, shift);  in OpRegRegShift()
618     return NewLIR2(opcode | wide, r_dest_src1.GetReg(), r_src2.GetReg());  in OpRegRegShift()
622       return NewLIR3(opcode | wide, r_dest_src1.GetReg(), r_src2.GetReg(), shift);  in OpRegRegShift()
630 LIR* Arm64Mir2Lir::OpRegRegExtend(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,  in OpRegRegExtend()  argument
645       return OpRegRegRegExtend(op, r_dest_src1, r_dest_src1, r_src2, ext, amount);  in OpRegRegExtend()
655       return NewLIR3(opcode | wide, r_dest_src1.GetReg(), r_src2.GetReg(),  in OpRegRegExtend()
664 LIR* Arm64Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {  in OpRegReg()  argument
669     return OpRegRegExtend(op, r_dest_src1, r_src2, kA64Uxtx, 0);  in OpRegReg()
671     return OpRegRegShift(op, r_dest_src1, r_src2, ENCODE_NO_SHIFT);  in OpRegReg()
696                                     RegStorage r_src2, int shift) {  in OpRegRegRegShift()  argument
752   CHECK_EQ(r_dest.Is64Bit(), r_src2.Is64Bit());  in OpRegRegRegShift()
755     return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift);  in OpRegRegRegShift()
759     return NewLIR3(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg());  in OpRegRegRegShift()
764                                      RegStorage r_src2, A64RegExtEncodings ext, uint8_t amount) {  in OpRegRegRegExtend()  argument
785     if (!r_src2.Is64Bit()) {  in OpRegRegRegExtend()
786       r_src2 = As64BitReg(r_src2);  in OpRegRegRegExtend()
790     CHECK(!r_src2.Is64Bit());  in OpRegRegRegExtend()
797   return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(),  in OpRegRegRegExtend()
801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {  in OpRegRegReg()  argument
802   return OpRegRegRegShift(op, r_dest, r_src1, r_src2, ENCODE_NO_SHIFT);  in OpRegRegReg()