Lines Matching refs:references

794   ArenaBitVector* references = new (arena_) ArenaBitVector(arena_, mir_graph_->GetNumSSARegs(),  in CreateNativeGcMap()  local
805 UpdateReferenceVRegs(mir, prev_mir, references); in CreateNativeGcMap()
806 max_ref_vreg = std::max(max_ref_vreg, references->GetHighestBitSet()); in CreateNativeGcMap()
825 UpdateReferenceVRegs(mir, prev_mir, references); in CreateNativeGcMap()
828 reinterpret_cast<const uint8_t*>(references->GetRawStorage())); in CreateNativeGcMap()
837 UpdateReferenceVRegs(mir, prev_mir, references); in CreateNativeGcMap()
839 const auto* raw_storage = references->GetRawStorage(); in CreateNativeGcMap()
873 const uint8_t* references = dex_gc_map.FindBitMap(dex_pc, false); in CreateNativeGcMapWithoutRegisterPromotion() local
874 CHECK(references != nullptr) << "Missing ref for dex pc 0x" << std::hex << dex_pc << in CreateNativeGcMapWithoutRegisterPromotion()
876 native_gc_map_builder.AddEntry(native_offset, references); in CreateNativeGcMapWithoutRegisterPromotion()
1362 void Mir2Lir::InitReferenceVRegs(BasicBlock* bb, BitVector* references) { in InitReferenceVRegs() argument
1372 references->ClearAllBits(); in InitReferenceVRegs()
1377 references->SetBit(vreg); in InitReferenceVRegs()
1387 for (uint32_t vreg : references->Indexes()) { in InitReferenceVRegs()
1391 references->ClearBit(vreg); in InitReferenceVRegs()
1397 bool Mir2Lir::UpdateReferenceVRegsLocal(MIR* mir, MIR* prev_mir, BitVector* references) { in UpdateReferenceVRegsLocal() argument
1408 references->SetBit(mir_graph_->SRegToVReg(defs[0])); in UpdateReferenceVRegsLocal()
1411 references->ClearBit(mir_graph_->SRegToVReg(defs[i])); in UpdateReferenceVRegsLocal()
1419 void Mir2Lir::UpdateReferenceVRegs(MIR* mir, MIR* prev_mir, BitVector* references) { in UpdateReferenceVRegs() argument
1422 InitReferenceVRegs(mir_graph_->GetEntryBlock(), references); in UpdateReferenceVRegs()
1427 references->ClearAllBits(); in UpdateReferenceVRegs()
1429 references->SetBit(mir_graph_->SRegToVReg(mir->ssa_rep->uses[0])); in UpdateReferenceVRegs()
1434 UpdateReferenceVRegsLocal(mir, prev_mir, references)) { in UpdateReferenceVRegs()
1439 InitReferenceVRegs(bb, references); in UpdateReferenceVRegs()
1440 bool success = UpdateReferenceVRegsLocal(mir, bb->first_mir_insn, references); in UpdateReferenceVRegs()