53 void MipsMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {  in GenCmpLong()
83 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) {  in OpCmpBranch()
149 LIR* MipsMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) {  in OpCmpImmBranch()
181 LIR* MipsMir2Lir::OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src) {  in OpRegCopyNoInsert()
216 void MipsMir2Lir::OpRegCopy(RegStorage r_dest, RegStorage r_src) {  in OpRegCopy()
223 void MipsMir2Lir::OpRegCopyWide(RegStorage r_dest, RegStorage r_src) {  in OpRegCopyWide()
280 void MipsMir2Lir::GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,  in GenSelectConst32()
293 void MipsMir2Lir::GenSelect(BasicBlock* bb, MIR* mir) {  in GenSelect()
298 void MipsMir2Lir::GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) {  in GenFusedLongCmpBranch()
303 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStorage reg2,  in GenDivRem()
316 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {  in GenDivRemLit()
330 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,  in GenDivRem()
337 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit,  in GenDivRemLit()
344 bool MipsMir2Lir::GenInlinedCas(CallInfo* info, bool is_long, bool is_object) {  in GenInlinedCas()
349 bool MipsMir2Lir::GenInlinedAbsFloat(CallInfo* info) {  in GenInlinedAbsFloat()
355 bool MipsMir2Lir::GenInlinedAbsDouble(CallInfo* info) {  in GenInlinedAbsDouble()
361 bool MipsMir2Lir::GenInlinedSqrt(CallInfo* info) {  in GenInlinedSqrt()
366 bool MipsMir2Lir::GenInlinedPeek(CallInfo* info, OpSize size) {  in GenInlinedPeek()
389 bool MipsMir2Lir::GenInlinedPoke(CallInfo* info, OpSize size) {  in GenInlinedPoke()
411 void MipsMir2Lir::OpPcRelLoad(RegStorage reg, LIR* target) {  in OpPcRelLoad()
417 LIR* MipsMir2Lir::OpVldm(RegStorage r_base, int count) {  in OpVldm()
423 LIR* MipsMir2Lir::OpVstm(RegStorage r_base, int count) {  in OpVstm()
429 void MipsMir2Lir::GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,  in GenMultiplyByTwoBitMultiplier()
441 void MipsMir2Lir::GenDivZeroCheckWide(RegStorage reg) {  in GenDivZeroCheckWide()
454 LIR* MipsMir2Lir::OpTestSuspend(LIR* target) {  in OpTestSuspend()
460 LIR* MipsMir2Lir::OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target) {  in OpDecAndBranch()
465 bool MipsMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,  in SmallLiteralDivRem()
472 bool MipsMir2Lir::EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) {  in EasyMultiply()
478 LIR* MipsMir2Lir::OpIT(ConditionCode cond, const char* guide) {  in OpIT()
484 void MipsMir2Lir::OpEndIT(LIR* it) {  in OpEndIT()
489 void MipsMir2Lir::GenAddLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {  in GenAddLong()
511 void MipsMir2Lir::GenSubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {  in GenSubLong()
532 void MipsMir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,  in GenArithOpLong()
600 void MipsMir2Lir::GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,  in GenLongOp()
609 void MipsMir2Lir::GenNotLong(RegLocation rl_dest, RegLocation rl_src) {  in GenNotLong()
616 void MipsMir2Lir::GenMulLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {  in GenMulLong()
624 void MipsMir2Lir::GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,  in GenDivRemLong()
639 void MipsMir2Lir::GenNegLong(RegLocation rl_dest, RegLocation rl_src) {  in GenNegLong()
667 void MipsMir2Lir::GenArrayGet(int opt_flags, OpSize size, RegLocation rl_array,  in GenArrayGet()
749 void MipsMir2Lir::GenArrayPut(int opt_flags, OpSize size, RegLocation rl_array,  in GenArrayPut()
828 void MipsMir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,  in GenShiftOpLong()
858 void MipsMir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,  in GenShiftImmOpLong()
896 void MipsMir2Lir::GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,  in GenArithImmOpLong()
902 void MipsMir2Lir::GenIntToLong(RegLocation rl_dest, RegLocation rl_src) {  in GenIntToLong()
913 void MipsMir2Lir::GenConversionCall(QuickEntrypointEnum trampoline, RegLocation rl_dest,  in GenConversionCall()