Lines Matching refs:rl_src1

53 void MipsMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {  in GenCmpLong()  argument
54 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
59 NewLIR3(kMipsSlt, temp.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenCmpLong()
60 NewLIR3(kMipsSlt, rl_result.reg.GetReg(), rl_src2.reg.GetReg(), rl_src1.reg.GetReg()); in GenCmpLong()
68 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenCmpLong()
69 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg()); in GenCmpLong()
72 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); in GenCmpLong()
73 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg()); in GenCmpLong()
330 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, in GenDivRem() argument
332 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags); in GenDivRem()
337 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, in GenDivRemLit() argument
339 UNUSED(rl_dest, rl_src1, lit, is_div); in GenDivRemLit()
489 void MipsMir2Lir::GenAddLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenAddLong() argument
490 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenAddLong()
501 OpRegRegReg(kOpAdd, rl_result.reg.GetLow(), rl_src2.reg.GetLow(), rl_src1.reg.GetLow()); in GenAddLong()
503 OpRegRegReg(kOpAdd, t_reg, rl_src2.reg.GetHigh(), rl_src1.reg.GetHigh()); in GenAddLong()
511 void MipsMir2Lir::GenSubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenSubLong() argument
512 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenSubLong()
524 NewLIR3(kMipsSltu, t_reg.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); in GenSubLong()
525 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenSubLong()
526 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenSubLong()
532 void MipsMir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenArithOpLong() argument
541 GenLongOp(kOpAdd, rl_dest, rl_src1, rl_src2); in GenArithOpLong()
545 GenLongOp(kOpSub, rl_dest, rl_src1, rl_src2); in GenArithOpLong()
549 GenMulLong(rl_dest, rl_src1, rl_src2); in GenArithOpLong()
553 GenDivRemLong(opcode, rl_dest, rl_src1, rl_src2, /*is_div*/ true, flags); in GenArithOpLong()
557 GenDivRemLong(opcode, rl_dest, rl_src1, rl_src2, /*is_div*/ false, flags); in GenArithOpLong()
561 GenLongOp(kOpAnd, rl_dest, rl_src1, rl_src2); in GenArithOpLong()
565 GenLongOp(kOpOr, rl_dest, rl_src1, rl_src2); in GenArithOpLong()
569 GenLongOp(kOpXor, rl_dest, rl_src1, rl_src2); in GenArithOpLong()
583 GenAddLong(rl_dest, rl_src1, rl_src2); in GenArithOpLong()
587 GenSubLong(rl_dest, rl_src1, rl_src2); in GenArithOpLong()
596 Mir2Lir::GenArithOpLong(opcode, rl_dest, rl_src1, rl_src2, flags); in GenArithOpLong()
600 void MipsMir2Lir::GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1, in GenLongOp() argument
602 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenLongOp()
605 OpRegRegReg(op, rl_result.reg, rl_src1.reg, rl_src2.reg); in GenLongOp()
616 void MipsMir2Lir::GenMulLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenMulLong() argument
617 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenMulLong()
620 NewLIR3(kMips64Dmul, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenMulLong()
624 void MipsMir2Lir::GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenDivRemLong() argument
628 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenDivRemLong()
634 NewLIR3(is_div ? kMips64Ddiv : kMips64Dmod, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), in GenDivRemLong()
828 void MipsMir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenShiftOpLong() argument
831 Mir2Lir::GenShiftOpLong(opcode, rl_dest, rl_src1, rl_shift); in GenShiftOpLong()
852 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenShiftOpLong()
854 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg)); in GenShiftOpLong()
859 RegLocation rl_src1, RegLocation rl_shift, int flags) { in GenShiftImmOpLong() argument
863 GenShiftOpLong(opcode, rl_dest, rl_src1, rl_shift); in GenShiftImmOpLong()
869 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenShiftImmOpLong()
871 StoreValueWide(rl_dest, rl_src1); in GenShiftImmOpLong()
892 OpRegRegImm(op, rl_result.reg, rl_src1.reg, shift_amount); in GenShiftImmOpLong()
897 RegLocation rl_src1, RegLocation rl_src2, int flags) { in GenArithImmOpLong() argument
899 GenArithOpLong(opcode, rl_dest, rl_src1, rl_src2, flags); in GenArithImmOpLong()