974     virtual LIR* LoadConstant(RegStorage r_dest, int value);
976     LIR* LoadWordDisp(RegStorage r_base, int displacement, RegStorage r_dest) {  in LoadWordDisp()  argument
977       return LoadBaseDisp(r_base, displacement, r_dest, kWord, kNotVolatile);  in LoadWordDisp()
980     LIR* Load32Disp(RegStorage r_base, int displacement, RegStorage r_dest)  {  in Load32Disp()  argument
981       return LoadBaseDisp(r_base, displacement, r_dest, k32, kNotVolatile);  in Load32Disp()
984     LIR* LoadRefDisp(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadRefDisp()  argument
986       return LoadBaseDisp(r_base, displacement, r_dest, kReference, is_volatile);  in LoadRefDisp()
989     LIR* LoadRefIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, int scale) {  in LoadRefIndexed()  argument
990       return LoadBaseIndexed(r_base, r_index, r_dest, scale, kReference);  in LoadRefIndexed()
997     virtual void LoadValueDirect(RegLocation rl_src, RegStorage r_dest);
999     virtual void LoadValueDirectFixed(RegLocation rl_src, RegStorage r_dest);
1001     virtual void LoadValueDirectWide(RegLocation rl_src, RegStorage r_dest);
1003     virtual void LoadValueDirectWideFixed(RegLocation rl_src, RegStorage r_dest);
1120     virtual void OpPcRelDexCacheArrayLoad(const DexFile* dex_file, int offset, RegStorage r_dest,
1151     virtual LIR* LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest,
1153     virtual LIR* LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest,
1155     virtual LIR* LoadConstantNoClobber(RegStorage r_dest, int value) = 0;
1156     virtual LIR* LoadConstantWide(RegStorage r_dest, int64_t value) = 0;
1411     virtual LIR* OpFpRegCopy(RegStorage r_dest, RegStorage r_src) = 0;
1417     virtual void OpRegCopy(RegStorage r_dest, RegStorage r_src) = 0;
1418     virtual LIR* OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src) = 0;
1430     virtual LIR* OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset,
1453     virtual LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) = 0;
1455     virtual LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) = 0;
1456     virtual LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1,