Lines Matching refs:reg_class

443 RegStorage Mir2Lir::AllocTypedTempWide(bool fp_hint, int reg_class, bool required) {  in AllocTypedTempWide()  argument
444 DCHECK_NE(reg_class, kRefReg); // NOTE: the Dalvik width of a reference is always 32 bits. in AllocTypedTempWide()
445 if (((reg_class == kAnyReg) && fp_hint) || (reg_class == kFPReg)) { in AllocTypedTempWide()
451 RegStorage Mir2Lir::AllocTypedTemp(bool fp_hint, int reg_class, bool required) { in AllocTypedTemp() argument
452 if (((reg_class == kAnyReg) && fp_hint) || (reg_class == kFPReg)) { in AllocTypedTemp()
454 } else if (reg_class == kRefReg) { in AllocTypedTemp()
471 RegStorage Mir2Lir::AllocLiveReg(int s_reg, int reg_class, bool wide) { in AllocLiveReg() argument
473 if (reg_class == kRefReg) { in AllocLiveReg()
477 if (!reg.Valid() && ((reg_class == kAnyReg) || (reg_class == kFPReg))) { in AllocLiveReg()
480 if (!reg.Valid() && (reg_class != kFPReg)) { in AllocLiveReg()
482 reg = FindLiveReg(wide || reg_class == kRefReg ? reg_pool_->core64_regs_ : in AllocLiveReg()
529 reg_class == kRefReg ? RefCheck::kCheckRef : RefCheck::kIgnoreRef, in AllocLiveReg()
789 bool Mir2Lir::RegClassMatches(int reg_class, RegStorage reg) { in RegClassMatches() argument
790 if (reg_class == kAnyReg) { in RegClassMatches()
792 } else if ((reg_class == kCoreReg) || (reg_class == kRefReg)) { in RegClassMatches()
1059 RegLocation Mir2Lir::EvalLocWide(RegLocation loc, int reg_class, bool update) { in EvalLocWide() argument
1066 if (!RegClassMatches(reg_class, loc.reg)) { in EvalLocWide()
1068 RegStorage new_regs = AllocTypedTempWide(loc.fp, reg_class); in EvalLocWide()
1083 loc.reg = AllocTypedTempWide(loc.fp, reg_class); in EvalLocWide()
1094 RegLocation Mir2Lir::EvalLoc(RegLocation loc, int reg_class, bool update) { in EvalLoc() argument
1096 if (loc.ref && reg_class == kAnyReg) { in EvalLoc()
1097 reg_class = kRefReg; in EvalLoc()
1101 return EvalLocWide(loc, reg_class, update); in EvalLoc()
1107 if (!RegClassMatches(reg_class, loc.reg)) { in EvalLoc()
1109 RegStorage new_reg = AllocTypedTemp(loc.fp, reg_class); in EvalLoc()
1122 loc.reg = AllocTypedTemp(loc.fp, reg_class); in EvalLoc()
1500 RegLocation Mir2Lir::GetReturnWide(RegisterClass reg_class) { in GetReturnWide() argument
1502 switch (reg_class) { in GetReturnWide()
1514 RegLocation Mir2Lir::GetReturn(RegisterClass reg_class) { in GetReturn() argument
1516 switch (reg_class) { in GetReturn()