Lines Matching refs:shift_amount
662 int shift_amount = CTZ(imm); in GenDivRemLit() local
663 OpRegImm(kOpAsr, rl_result.reg, shift_amount); in GenDivRemLit()
1755 int shift_amount = CTZ(val); in GenMulLongConst() local
1759 shift_amount, flags); in GenMulLongConst()
2198 int shift_amount = CTZ(imm); in GenDivRemLongLit() local
2199 OpRegImm(kOpAsr, rl_result.reg, shift_amount); in GenDivRemLongLit()
2552 RegLocation rl_src, int shift_amount, int flags) { in GenShiftImmOpLong() argument
2573 OpRegRegImm(op, rl_result.reg, rl_src.reg, shift_amount); in GenShiftImmOpLong()
2578 DCHECK_NE(shift_amount, 1); // Prevent a double store from happening. in GenShiftImmOpLong()
2579 if (shift_amount == 32) { in GenShiftImmOpLong()
2582 } else if (shift_amount > 31) { in GenShiftImmOpLong()
2584 NewLIR2(kX86Sal32RI, rl_result.reg.GetHighReg(), shift_amount - 32); in GenShiftImmOpLong()
2590 shift_amount); in GenShiftImmOpLong()
2591 NewLIR2(kX86Sal32RI, rl_result.reg.GetLowReg(), shift_amount); in GenShiftImmOpLong()
2596 if (shift_amount == 32) { in GenShiftImmOpLong()
2600 } else if (shift_amount > 31) { in GenShiftImmOpLong()
2603 NewLIR2(kX86Sar32RI, rl_result.reg.GetLowReg(), shift_amount - 32); in GenShiftImmOpLong()
2609 shift_amount); in GenShiftImmOpLong()
2610 NewLIR2(kX86Sar32RI, rl_result.reg.GetHighReg(), shift_amount); in GenShiftImmOpLong()
2615 if (shift_amount == 32) { in GenShiftImmOpLong()
2618 } else if (shift_amount > 31) { in GenShiftImmOpLong()
2620 NewLIR2(kX86Shr32RI, rl_result.reg.GetLowReg(), shift_amount - 32); in GenShiftImmOpLong()
2626 shift_amount); in GenShiftImmOpLong()
2627 NewLIR2(kX86Shr32RI, rl_result.reg.GetHighReg(), shift_amount); in GenShiftImmOpLong()
2640 int shift_amount = mir_graph_->ConstantValue(rl_shift) & 0x3f; in GenShiftImmOpLong() local
2641 if (shift_amount == 0) { in GenShiftImmOpLong()
2645 } else if (shift_amount == 1 && in GenShiftImmOpLong()
2656 RegLocation rl_result = GenShiftImmOpLong(opcode, rl_dest, rl_src, shift_amount, flags); in GenShiftImmOpLong()