1438   switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {  in GenMachineSpecificExtendedMethodMIR()
1488       GenMemBarrier(static_cast<MemBarrierKind>(mir->dalvikInsn.vA));  in GenMachineSpecificExtendedMethodMIR()
1502   for (uint32_t i = mir->dalvikInsn.vA; i <= mir->dalvikInsn.vB; i++) {  in ReserveVectorRegisters()
1520   for (uint32_t i = mir->dalvikInsn.vA; i <= mir->dalvikInsn.vB; i++) {  in ReturnVectorRegisters()
1537   RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenConst128()
1540   uint32_t *args = mir->dalvikInsn.arg;  in GenConst128()
1555   constants[3] = mir->dalvikInsn.arg[0];  in AppendOpcodeWithConst()
1556   constants[2] = mir->dalvikInsn.arg[1];  in AppendOpcodeWithConst()
1557   constants[1] = mir->dalvikInsn.arg[2];  in AppendOpcodeWithConst()
1558   constants[0] = mir->dalvikInsn.arg[3];  in AppendOpcodeWithConst()
1591   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenMoveVector()
1592   RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenMoveVector()
1594   RegStorage rs_src = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenMoveVector()
1706   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenMultiplyVector()
1707   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenMultiplyVector()
1708   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenMultiplyVector()
1710   RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenMultiplyVector()
1740   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenAddVector()
1741   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenAddVector()
1742   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenAddVector()
1744   RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenAddVector()
1775   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenSubtractVector()
1776   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenSubtractVector()
1777   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenSubtractVector()
1779   RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenSubtractVector()
1812   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenShiftByteVector()
1815   switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {  in GenShiftByteVector()
1828   int imm = mir->dalvikInsn.vB;  in GenShiftByteVector()
1854   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenShiftLeftVector()
1855   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenShiftLeftVector()
1856   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenShiftLeftVector()
1858   int imm = mir->dalvikInsn.vB;  in GenShiftLeftVector()
1883   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenSignedShiftRightVector()
1884   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenSignedShiftRightVector()
1885   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenSignedShiftRightVector()
1887   int imm = mir->dalvikInsn.vB;  in GenSignedShiftRightVector()
1911   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenUnsignedShiftRightVector()
1912   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenUnsignedShiftRightVector()
1913   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenUnsignedShiftRightVector()
1915   int imm = mir->dalvikInsn.vB;  in GenUnsignedShiftRightVector()
1941   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenAndVector()
1942   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenAndVector()
1944   RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenAndVector()
1950   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenOrVector()
1951   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenOrVector()
1953   RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenOrVector()
1959   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenXorVector()
1960   RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenXorVector()
1962   RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenXorVector()
1974   const_mirp->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpConstVector);  in MaskVectorRegister()
1975   const_mirp->dalvikInsn.arg[0] = m0;  in MaskVectorRegister()
1976   const_mirp->dalvikInsn.arg[1] = m1;  in MaskVectorRegister()
1977   const_mirp->dalvikInsn.arg[2] = m2;  in MaskVectorRegister()
1978   const_mirp->dalvikInsn.arg[3] = m3;  in MaskVectorRegister()
1985   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenAddReduceVector()
1986   RegStorage vector_src = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenAddReduceVector()
2081     int vec_bytes = (mir->dalvikInsn.vC & 0xFFFF) / 8;  in GenAddReduceVector()
2134   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenReduceVector()
2136   RegStorage vector_src = RegStorage::Solo128(mir->dalvikInsn.vB);  in GenReduceVector()
2145     int extract_index = mir->dalvikInsn.arg[0];  in GenReduceVector()
2203     int extract_index = mir->dalvikInsn.arg[0];  in GenReduceVector()
2252   DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U);  in GenSetVector()
2253   OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);  in GenSetVector()
2254   RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA);  in GenSetVector()