Lines Matching refs:r_dest

33 LIR* X86Mir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) {  in OpFpRegCopy()  argument
36 DCHECK(r_dest.IsFloat() || r_src.IsFloat()); in OpFpRegCopy()
37 DCHECK_EQ(r_dest.IsDouble(), r_src.IsDouble()); in OpFpRegCopy()
38 if (r_dest.IsDouble()) { in OpFpRegCopy()
41 if (r_dest.IsSingle()) { in OpFpRegCopy()
53 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); in OpFpRegCopy()
54 if (r_dest == r_src) { in OpFpRegCopy()
87 LIR* X86Mir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) { in LoadConstantNoClobber() argument
88 RegStorage r_dest_save = r_dest; in LoadConstantNoClobber()
89 if (r_dest.IsFloat()) { in LoadConstantNoClobber()
91 return NewLIR2(kX86XorpsRR, r_dest.GetReg(), r_dest.GetReg()); in LoadConstantNoClobber()
93 r_dest = AllocTemp(); in LoadConstantNoClobber()
98 res = NewLIR2(kX86Xor32RR, r_dest.GetReg(), r_dest.GetReg()); in LoadConstantNoClobber()
102 res = NewLIR2(kX86Mov32RI, r_dest.GetReg(), value); in LoadConstantNoClobber()
106 NewLIR2(kX86MovdxrRR, r_dest_save.GetReg(), r_dest.GetReg()); in LoadConstantNoClobber()
107 FreeTemp(r_dest); in LoadConstantNoClobber()
257 LIR* X86Mir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type) { in OpMovRegMem() argument
260 int dest = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); in OpMovRegMem()
263 CHECK(!r_dest.IsFloat()); in OpMovRegMem()
267 CHECK(!r_dest.IsFloat()); in OpMovRegMem()
271 CHECK(!r_dest.IsFloat()); in OpMovRegMem()
275 CHECK(r_dest.IsFloat()); in OpMovRegMem()
279 CHECK(r_dest.IsFloat()); in OpMovRegMem()
283 CHECK(r_dest.IsFloat()); in OpMovRegMem()
287 CHECK(r_dest.IsFloat()); in OpMovRegMem()
291 CHECK(r_dest.IsFloat()); in OpMovRegMem()
295 CHECK(r_dest.IsFloat()); in OpMovRegMem()
362 LIR* X86Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { in OpCondRegReg() argument
365 DCHECK_EQ(r_dest.Is64Bit(), r_src.Is64Bit()); in OpCondRegReg()
366 return NewLIR3(r_dest.Is64Bit() ? kX86Cmov64RRC : kX86Cmov32RRC, r_dest.GetReg(), in OpCondRegReg()
370 LIR* X86Mir2Lir::OpRegMem(OpKind op, RegStorage r_dest, RegStorage r_base, int offset) { in OpRegMem() argument
371 bool is64Bit = r_dest.Is64Bit(); in OpRegMem()
390 LIR *l = NewLIR3(opcode, r_dest.GetReg(), r_base.GetReg(), offset); in OpRegMem()
426 LIR* X86Mir2Lir::OpRegMem(OpKind op, RegStorage r_dest, RegLocation rl_value) { in OpRegMem() argument
428 bool is64Bit = r_dest.Is64Bit(); in OpRegMem()
444 LIR *l = NewLIR3(opcode, r_dest.GetReg(), rs_rX86_SP_32.GetReg(), displacement); in OpRegMem()
451 LIR* X86Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegReg() argument
453 bool is64Bit = r_dest.Is64Bit(); in OpRegRegReg()
454 if (r_dest != r_src1 && r_dest != r_src2) { in OpRegRegReg()
457 OpRegCopy(r_dest, r_src1); in OpRegRegReg()
458 return OpRegImm(kOpLsl, r_dest, 1); in OpRegRegReg()
460 return NewLIR5(is64Bit ? kX86Lea64RA : kX86Lea32RA, r_dest.GetReg(), in OpRegRegReg()
464 return NewLIR5(is64Bit ? kX86Lea64RA : kX86Lea32RA, r_dest.GetReg(), in OpRegRegReg()
469 OpRegCopy(r_dest, r_src1); in OpRegRegReg()
470 return OpRegReg(op, r_dest, r_src2); in OpRegRegReg()
472 } else if (r_dest == r_src1) { in OpRegRegReg()
473 return OpRegReg(op, r_dest, r_src2); in OpRegRegReg()
477 OpReg(kOpNeg, r_dest); in OpRegRegReg()
485 LIR* res = OpRegCopyNoInsert(r_dest, t_reg); in OpRegRegReg()
500 return OpRegReg(op, r_dest, r_src1); in OpRegRegReg()
504 LIR* X86Mir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src, int value) { in OpRegRegImm() argument
507 return NewLIR3(opcode, r_dest.GetReg(), r_src.GetReg(), value); in OpRegRegImm()
510 return NewLIR2(kX86Movzx8RR, r_dest.GetReg(), r_src.GetReg()); in OpRegRegImm()
512 return NewLIR2(kX86Movzx16RR, r_dest.GetReg(), r_src.GetReg()); in OpRegRegImm()
515 if (r_dest != r_src) { in OpRegRegImm()
518 return NewLIR5(kX86Lea32RA, r_dest.GetReg(), r5sib_no_base /* base */, in OpRegRegImm()
521 return NewLIR5(r_dest.Is64Bit() ? kX86Lea64RA : kX86Lea32RA, r_dest.GetReg(), in OpRegRegImm()
525 OpRegCopy(r_dest, r_src); in OpRegRegImm()
527 return OpRegImm(op, r_dest, value); in OpRegRegImm()
567 LIR* X86Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() argument
570 int32_t low_reg_val = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); in LoadConstantWide()
572 bool is_fp = r_dest.IsFloat(); in LoadConstantWide()
575 DCHECK(r_dest.IsDouble()); in LoadConstantWide()
607 if (r_dest.IsPair()) { in LoadConstantWide()
622 OpRegCopyWide(r_dest, r_temp); in LoadConstantWide()
627 if (r_dest.IsPair()) { in LoadConstantWide()
628 res = LoadConstantNoClobber(r_dest.GetLow(), val_lo); in LoadConstantWide()
629 LoadConstantNoClobber(r_dest.GetHigh(), val_hi); in LoadConstantWide()
632 res = NewLIR2(kX86Xor64RR, r_dest.GetReg(), r_dest.GetReg()); in LoadConstantWide()
634 res = NewLIR2(kX86Mov64RI32, r_dest.GetReg(), val_lo); in LoadConstantWide()
636 res = NewLIR3(kX86Mov64RI64, r_dest.GetReg(), val_hi, val_lo); in LoadConstantWide()
644 int displacement, RegStorage r_dest, OpSize size) { in LoadBaseIndexedDisp() argument
648 bool pair = r_dest.IsPair(); in LoadBaseIndexedDisp()
654 if (r_dest.IsFloat()) { in LoadBaseIndexedDisp()
668 CHECK_EQ(r_dest.IsFloat(), false); in LoadBaseIndexedDisp()
676 if (r_dest.IsFloat()) { in LoadBaseIndexedDisp()
678 DCHECK(r_dest.IsFloat()); in LoadBaseIndexedDisp()
702 load = NewLIR3(opcode, r_dest.GetReg(), r_base.GetReg(), displacement + LOWORD_OFFSET); in LoadBaseIndexedDisp()
704 DCHECK(!r_dest.IsFloat()); // Make sure we're not still using a pair here. in LoadBaseIndexedDisp()
705 if (r_base == r_dest.GetLow()) { in LoadBaseIndexedDisp()
706 load = NewLIR3(opcode, r_dest.GetHighReg(), r_base.GetReg(), in LoadBaseIndexedDisp()
708 load2 = NewLIR3(opcode, r_dest.GetLowReg(), r_base.GetReg(), displacement + LOWORD_OFFSET); in LoadBaseIndexedDisp()
710 load = NewLIR3(opcode, r_dest.GetLowReg(), r_base.GetReg(), displacement + LOWORD_OFFSET); in LoadBaseIndexedDisp()
711 load2 = NewLIR3(opcode, r_dest.GetHighReg(), r_base.GetReg(), in LoadBaseIndexedDisp()
726 load = NewLIR5(opcode, r_dest.GetReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
729 DCHECK(!r_dest.IsFloat()); // Make sure we're not still using a pair here. in LoadBaseIndexedDisp()
730 if (r_base == r_dest.GetLow()) { in LoadBaseIndexedDisp()
731 if (r_dest.GetHigh() == r_index) { in LoadBaseIndexedDisp()
736 load2 = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
738 OpRegCopy(r_dest.GetHigh(), temp); in LoadBaseIndexedDisp()
741 load = NewLIR5(opcode, r_dest.GetHighReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
743 load2 = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
747 if (r_dest.GetLow() == r_index) { in LoadBaseIndexedDisp()
752 load2 = NewLIR5(opcode, r_dest.GetHighReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
754 OpRegCopy(r_dest.GetLow(), temp); in LoadBaseIndexedDisp()
757 load = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
759 load2 = NewLIR5(opcode, r_dest.GetHighReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
771 LIR* X86Mir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, in LoadBaseIndexed() argument
773 return LoadBaseIndexedDisp(r_base, r_index, scale, 0, r_dest, size); in LoadBaseIndexed()
776 LIR* X86Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() argument
781 LIR* load = LoadBaseIndexedDisp(r_base, RegStorage::InvalidReg(), 0, displacement, r_dest, in LoadBaseDisp()