Lines Matching refs:FromGpuRegister

36   return Mips64ManagedRegister::FromGpuRegister(T9);  in InterproceduralScratchRegister()
40   return Mips64ManagedRegister::FromGpuRegister(T9);  in InterproceduralScratchRegister()
49     return Mips64ManagedRegister::FromGpuRegister(V0);  in ReturnRegisterForShorty()
62   return Mips64ManagedRegister::FromGpuRegister(V0);  in IntReturnRegister()
68   return Mips64ManagedRegister::FromGpuRegister(A0);  in MethodRegister()
110           Mips64ManagedRegister reg = Mips64ManagedRegister::FromGpuRegister(arg);  in EntrySpills()
129   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S2));  in Mips64JniCallingConvention()
130   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S3));  in Mips64JniCallingConvention()
131   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S4));  in Mips64JniCallingConvention()
132   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S5));  in Mips64JniCallingConvention()
133   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S6));  in Mips64JniCallingConvention()
134   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S7));  in Mips64JniCallingConvention()
135   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(GP));  in Mips64JniCallingConvention()
136   callee_save_regs_.push_back(Mips64ManagedRegister::FromGpuRegister(S8));  in Mips64JniCallingConvention()
147   return Mips64ManagedRegister::FromGpuRegister(AT);  in ReturnScratchRegister()
177     return Mips64ManagedRegister::FromGpuRegister(kGpuArgumentRegisters[itr_args_]);  in CurrentParamRegister()