Lines Matching refs:__
56 #define __ reinterpret_cast<ArmAssembler*>(codegen->GetAssembler())-> macro
65 __ Bind(GetEntryLabel()); in EmitNativeCode()
81 __ Bind(GetEntryLabel()); in EmitNativeCode()
98 __ Bind(GetEntryLabel()); in EmitNativeCode()
104 __ b(GetReturnLabel()); in EmitNativeCode()
106 __ b(arm_codegen->GetLabelOf(successor_)); in EmitNativeCode()
141 __ Bind(GetEntryLabel()); in EmitNativeCode()
178 __ Bind(GetEntryLabel()); in EmitNativeCode()
182 __ LoadImmediate(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); in EmitNativeCode()
195 __ b(GetExitLabel()); in EmitNativeCode()
224 __ Bind(GetEntryLabel()); in EmitNativeCode()
228 __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction_->GetStringIndex()); in EmitNativeCode()
234 __ b(GetExitLabel()); in EmitNativeCode()
260 __ Bind(GetEntryLabel()); in EmitNativeCode()
284 __ b(GetExitLabel()); in EmitNativeCode()
302 __ Bind(GetEntryLabel()); in EmitNativeCode()
316 #undef __
318 #undef __
319 #define __ reinterpret_cast<ArmAssembler*>(GetAssembler())-> macro
358 __ StoreToOffset(kStoreWord, static_cast<Register>(reg_id), SP, stack_index); in SaveCoreRegister()
363 __ LoadFromOffset(kLoadWord, static_cast<Register>(reg_id), SP, stack_index); in RestoreCoreRegister()
368 __ StoreSToOffset(static_cast<SRegister>(reg_id), SP, stack_index); in SaveFloatingPointRegister()
373 __ LoadSFromOffset(static_cast<SRegister>(reg_id), SP, stack_index); in RestoreFloatingPointRegister()
529 __ Bind(&frame_entry_label_); in GenerateFrameEntry()
536 __ AddConstant(IP, SP, -static_cast<int32_t>(GetStackOverflowReservedBytes(kArm))); in GenerateFrameEntry()
537 __ LoadFromOffset(kLoadWord, IP, IP, 0); in GenerateFrameEntry()
544 __ PushList(push_mask); in GenerateFrameEntry()
545 __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(push_mask)); in GenerateFrameEntry()
546 __ cfi().RelOffsetForMany(DWARFReg(R0), 0, push_mask, kArmWordSize); in GenerateFrameEntry()
549 __ vpushs(start_register, POPCOUNT(fpu_spill_mask_)); in GenerateFrameEntry()
550 __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(fpu_spill_mask_)); in GenerateFrameEntry()
551 __ cfi().RelOffsetForMany(DWARFReg(S0), 0, fpu_spill_mask_, kArmWordSize); in GenerateFrameEntry()
554 __ AddConstant(SP, -adjust); in GenerateFrameEntry()
555 __ cfi().AdjustCFAOffset(adjust); in GenerateFrameEntry()
556 __ StoreToOffset(kStoreWord, R0, SP, 0); in GenerateFrameEntry()
561 __ bx(LR); in GenerateFrameExit()
564 __ cfi().RememberState(); in GenerateFrameExit()
566 __ AddConstant(SP, adjust); in GenerateFrameExit()
567 __ cfi().AdjustCFAOffset(-adjust); in GenerateFrameExit()
570 __ vpops(start_register, POPCOUNT(fpu_spill_mask_)); in GenerateFrameExit()
571 __ cfi().AdjustCFAOffset(-kArmPointerSize * POPCOUNT(fpu_spill_mask_)); in GenerateFrameExit()
572 __ cfi().RestoreMany(DWARFReg(SRegister(0)), fpu_spill_mask_); in GenerateFrameExit()
574 __ PopList(core_spill_mask_); in GenerateFrameExit()
575 __ cfi().RestoreState(); in GenerateFrameExit()
576 __ cfi().DefCFAOffset(GetFrameSize()); in GenerateFrameExit()
580 __ Bind(GetLabelOf(block)); in Bind()
717 __ Mov(destination.AsRegister<Register>(), source.AsRegister<Register>()); in Move32()
719 __ vmovrs(destination.AsRegister<Register>(), source.AsFpuRegister<SRegister>()); in Move32()
721 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex()); in Move32()
725 __ vmovsr(destination.AsFpuRegister<SRegister>(), source.AsRegister<Register>()); in Move32()
727 __ vmovs(destination.AsFpuRegister<SRegister>(), source.AsFpuRegister<SRegister>()); in Move32()
729 __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex()); in Move32()
734 __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex()); in Move32()
736 __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex()); in Move32()
739 __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex()); in Move32()
740 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in Move32()
763 __ LoadFromOffset(kLoadWordPair, destination.AsRegisterPairLow<Register>(), in Move64()
768 __ LoadDFromOffset(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()), in Move64()
780 __ StoreToOffset(kStoreWord, R1, SP, destination.GetStackIndex()); in Move64()
781 __ StoreToOffset(kStoreWord, R2, SP, destination.GetHighStackIndex(kArmWordSize)); in Move64()
783 __ StoreToOffset(kStoreWordPair, source.AsRegisterPairLow<Register>(), in Move64()
787 __ StoreDToOffset(FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()), in Move64()
814 __ LoadImmediate(location.AsRegister<Register>(), value); in Move()
817 __ LoadImmediate(IP, value); in Move()
818 __ StoreToOffset(kStoreWord, IP, SP, location.GetStackIndex()); in Move()
824 __ LoadImmediate(location.AsRegisterPairLow<Register>(), Low32Bits(value)); in Move()
825 __ LoadImmediate(location.AsRegisterPairHigh<Register>(), High32Bits(value)); in Move()
828 __ LoadImmediate(IP, Low32Bits(value)); in Move()
829 __ StoreToOffset(kStoreWord, IP, SP, location.GetStackIndex()); in Move()
830 __ LoadImmediate(IP, High32Bits(value)); in Move()
831 __ StoreToOffset(kStoreWord, IP, SP, location.GetHighStackIndex(kArmWordSize)); in Move()
891 __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset); in InvokeRuntime()
892 __ blx(LR); in InvokeRuntime()
924 __ b(codegen_->GetLabelOf(successor)); in VisitGoto()
946 __ b(always_true_target); in GenerateTestAndBranch()
956 __ cmp(instruction->GetLocations()->InAt(0).AsRegister<Register>(), in GenerateTestAndBranch()
958 __ b(true_target, NE); in GenerateTestAndBranch()
966 __ cmp(left, ShifterOperand(locations->InAt(1).AsRegister<Register>())); in GenerateTestAndBranch()
973 __ cmp(left, operand); in GenerateTestAndBranch()
976 __ LoadImmediate(temp, value); in GenerateTestAndBranch()
977 __ cmp(left, ShifterOperand(temp)); in GenerateTestAndBranch()
980 __ b(true_target, ARMCondition(cond->AsCondition()->GetCondition())); in GenerateTestAndBranch()
984 __ b(false_target); in GenerateTestAndBranch()
1046 __ cmp(left, ShifterOperand(locations->InAt(1).AsRegister<Register>())); in VisitCondition()
1052 __ cmp(left, operand); in VisitCondition()
1055 __ LoadImmediate(temp, value); in VisitCondition()
1056 __ cmp(left, ShifterOperand(temp)); in VisitCondition()
1059 __ it(ARMCondition(comp->GetCondition()), kItElse); in VisitCondition()
1060 __ mov(locations->Out().AsRegister<Register>(), ShifterOperand(1), in VisitCondition()
1062 __ mov(locations->Out().AsRegister<Register>(), ShifterOperand(0), in VisitCondition()
1258 __ LoadFromOffset(kLoadWord, reg, SP, kCurrentMethodStackOffset); in LoadCurrentMethod()
1322 __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex()); in VisitInvokeVirtual()
1323 __ LoadFromOffset(kLoadWord, temp, temp, class_offset); in VisitInvokeVirtual()
1325 __ LoadFromOffset(kLoadWord, temp, receiver.AsRegister<Register>(), class_offset); in VisitInvokeVirtual()
1331 __ LoadFromOffset(kLoadWord, temp, temp, method_offset); in VisitInvokeVirtual()
1333 __ LoadFromOffset(kLoadWord, LR, temp, entry_point); in VisitInvokeVirtual()
1335 __ blx(LR); in VisitInvokeVirtual()
1356 __ LoadImmediate(invoke->GetLocations()->GetTemp(1).AsRegister<Register>(), in VisitInvokeInterface()
1361 __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex()); in VisitInvokeInterface()
1362 __ LoadFromOffset(kLoadWord, temp, temp, class_offset); in VisitInvokeInterface()
1364 __ LoadFromOffset(kLoadWord, temp, receiver.AsRegister<Register>(), class_offset); in VisitInvokeInterface()
1370 __ LoadFromOffset(kLoadWord, temp, temp, method_offset); in VisitInvokeInterface()
1372 __ LoadFromOffset(kLoadWord, LR, temp, entry_point); in VisitInvokeInterface()
1374 __ blx(LR); in VisitInvokeInterface()
1412 __ rsb(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(0)); in VisitNeg()
1418 __ rsbs(out.AsRegisterPairLow<Register>(), in VisitNeg()
1427 __ sbc(out.AsRegisterPairHigh<Register>(), in VisitNeg()
1431 __ sub(out.AsRegisterPairHigh<Register>(), in VisitNeg()
1438 __ vnegs(out.AsFpuRegister<SRegister>(), in.AsFpuRegister<SRegister>()); in VisitNeg()
1443 __ vnegd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitNeg()
1682 __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 8); in VisitTypeConversion()
1699 __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16); in VisitTypeConversion()
1714 __ Mov(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>()); in VisitTypeConversion()
1716 __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), SP, in.GetStackIndex()); in VisitTypeConversion()
1721 __ LoadImmediate(out.AsRegister<Register>(), static_cast<int32_t>(value)); in VisitTypeConversion()
1728 __ vmovs(temp, in.AsFpuRegister<SRegister>()); in VisitTypeConversion()
1729 __ vcvtis(temp, temp); in VisitTypeConversion()
1730 __ vmovrs(out.AsRegister<Register>(), temp); in VisitTypeConversion()
1738 __ vmovd(temp_d, FromLowSToD(in.AsFpuRegisterPairLow<SRegister>())); in VisitTypeConversion()
1739 __ vcvtid(temp_s, temp_d); in VisitTypeConversion()
1740 __ vmovrs(out.AsRegister<Register>(), temp_s); in VisitTypeConversion()
1761 __ Mov(out.AsRegisterPairLow<Register>(), in.AsRegister<Register>()); in VisitTypeConversion()
1763 __ Asr(out.AsRegisterPairHigh<Register>(), in VisitTypeConversion()
1798 __ ubfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16); in VisitTypeConversion()
1816 __ vmovsr(out.AsFpuRegister<SRegister>(), in.AsRegister<Register>()); in VisitTypeConversion()
1817 __ vcvtsi(out.AsFpuRegister<SRegister>(), out.AsFpuRegister<SRegister>()); in VisitTypeConversion()
1840 __ vmovsr(temp1_s, high); in VisitTypeConversion()
1841 __ vcvtdi(temp1_d, temp1_s); in VisitTypeConversion()
1848 __ LoadImmediate(constant_low, Low32Bits(k2Pow32EncodingForDouble)); in VisitTypeConversion()
1849 __ LoadImmediate(constant_high, High32Bits(k2Pow32EncodingForDouble)); in VisitTypeConversion()
1850 __ vmovdrr(temp2_d, constant_low, constant_high); in VisitTypeConversion()
1852 __ vmuld(temp1_d, temp1_d, temp2_d); in VisitTypeConversion()
1854 __ vmovsr(temp2_s, low); in VisitTypeConversion()
1855 __ vcvtdu(temp2_d, temp2_s); in VisitTypeConversion()
1857 __ vaddd(temp1_d, temp1_d, temp2_d); in VisitTypeConversion()
1859 __ vcvtsd(output, temp1_d); in VisitTypeConversion()
1865 __ vcvtsd(out.AsFpuRegister<SRegister>(), in VisitTypeConversion()
1884 __ vmovsr(out.AsFpuRegisterPairLow<SRegister>(), in.AsRegister<Register>()); in VisitTypeConversion()
1885 __ vcvtdi(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitTypeConversion()
1902 __ vmovsr(out_s, high); in VisitTypeConversion()
1903 __ vcvtdi(out_d, out_s); in VisitTypeConversion()
1909 __ LoadImmediate(constant_low, Low32Bits(k2Pow32EncodingForDouble)); in VisitTypeConversion()
1910 __ LoadImmediate(constant_high, High32Bits(k2Pow32EncodingForDouble)); in VisitTypeConversion()
1911 __ vmovdrr(temp_d, constant_low, constant_high); in VisitTypeConversion()
1913 __ vmuld(out_d, out_d, temp_d); in VisitTypeConversion()
1915 __ vmovsr(temp_s, low); in VisitTypeConversion()
1916 __ vcvtdu(temp_d, temp_s); in VisitTypeConversion()
1918 __ vaddd(out_d, out_d, temp_d); in VisitTypeConversion()
1924 __ vcvtds(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitTypeConversion()
1979 __ add(out.AsRegister<Register>(), in VisitAdd()
1983 __ AddConstant(out.AsRegister<Register>(), in VisitAdd()
1991 __ adds(out.AsRegisterPairLow<Register>(), in VisitAdd()
1994 __ adc(out.AsRegisterPairHigh<Register>(), in VisitAdd()
2001 __ vadds(out.AsFpuRegister<SRegister>(), in VisitAdd()
2007 __ vaddd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitAdd()
2054 __ sub(out.AsRegister<Register>(), in VisitSub()
2058 __ AddConstant(out.AsRegister<Register>(), in VisitSub()
2067 __ subs(out.AsRegisterPairLow<Register>(), in VisitSub()
2070 __ sbc(out.AsRegisterPairHigh<Register>(), in VisitSub()
2077 __ vsubs(out.AsFpuRegister<SRegister>(), in VisitSub()
2084 __ vsubd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitSub()
2128 __ mul(out.AsRegister<Register>(), in VisitMul()
2154 __ mul(IP, in1_lo, in2_hi); in VisitMul()
2156 __ mla(out_hi, in1_hi, in2_lo, IP); in VisitMul()
2158 __ umull(out_lo, IP, in1_lo, in2_lo); in VisitMul()
2160 __ add(out_hi, out_hi, ShifterOperand(IP)); in VisitMul()
2165 __ vmuls(out.AsFpuRegister<SRegister>(), in VisitMul()
2172 __ vmuld(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitMul()
2243 __ sdiv(out.AsRegister<Register>(), in VisitDiv()
2271 __ vdivs(out.AsFpuRegister<SRegister>(), in VisitDiv()
2278 __ vdivd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), in VisitDiv()
2369 __ sdiv(temp, reg1, reg2); in VisitRem()
2370 __ mul(temp, temp, reg2); in VisitRem()
2371 __ sub(out.AsRegister<Register>(), reg1, ShifterOperand(temp)); in VisitRem()
2422 __ cmp(value.AsRegister<Register>(), ShifterOperand(0)); in VisitDivZeroCheck()
2423 __ b(slow_path->GetEntryLabel(), EQ); in VisitDivZeroCheck()
2427 __ b(slow_path->GetEntryLabel()); in VisitDivZeroCheck()
2434 __ orrs(IP, in VisitDivZeroCheck()
2437 __ b(slow_path->GetEntryLabel(), EQ); in VisitDivZeroCheck()
2441 __ b(slow_path->GetEntryLabel()); in VisitDivZeroCheck()
2494 __ and_(out_reg, second_reg, ShifterOperand(kMaxIntShiftValue)); in HandleShift()
2496 __ Lsl(out_reg, first_reg, out_reg); in HandleShift()
2498 __ Asr(out_reg, first_reg, out_reg); in HandleShift()
2500 __ Lsr(out_reg, first_reg, out_reg); in HandleShift()
2506 __ Mov(out_reg, first_reg); in HandleShift()
2508 __ Lsl(out_reg, first_reg, shift_value); in HandleShift()
2510 __ Asr(out_reg, first_reg, shift_value); in HandleShift()
2512 __ Lsr(out_reg, first_reg, shift_value); in HandleShift()
2529 __ and_(o_l, second_reg, ShifterOperand(kMaxLongShiftValue)); in HandleShift()
2531 __ Lsl(o_h, high, o_l); in HandleShift()
2533 __ rsb(temp, o_l, ShifterOperand(kArmBitsPerWord)); in HandleShift()
2534 __ Lsr(temp, low, temp); in HandleShift()
2535 __ orr(o_h, o_h, ShifterOperand(temp)); in HandleShift()
2537 __ subs(temp, o_l, ShifterOperand(kArmBitsPerWord)); in HandleShift()
2538 __ it(PL); in HandleShift()
2539 __ Lsl(o_h, low, temp, false, PL); in HandleShift()
2541 __ Lsl(o_l, low, o_l); in HandleShift()
2543 __ and_(o_h, second_reg, ShifterOperand(kMaxLongShiftValue)); in HandleShift()
2545 __ Lsr(o_l, low, o_h); in HandleShift()
2547 __ rsb(temp, o_h, ShifterOperand(kArmBitsPerWord)); in HandleShift()
2548 __ Lsl(temp, high, temp); in HandleShift()
2549 __ orr(o_l, o_l, ShifterOperand(temp)); in HandleShift()
2551 __ subs(temp, o_h, ShifterOperand(kArmBitsPerWord)); in HandleShift()
2552 __ it(PL); in HandleShift()
2553 __ Asr(o_l, high, temp, false, PL); in HandleShift()
2555 __ Asr(o_h, high, o_h); in HandleShift()
2557 __ and_(o_h, second_reg, ShifterOperand(kMaxLongShiftValue)); in HandleShift()
2559 __ Lsr(o_l, low, o_h); in HandleShift()
2560 __ rsb(temp, o_h, ShifterOperand(kArmBitsPerWord)); in HandleShift()
2561 __ Lsl(temp, high, temp); in HandleShift()
2562 __ orr(o_l, o_l, ShifterOperand(temp)); in HandleShift()
2563 __ subs(temp, o_h, ShifterOperand(kArmBitsPerWord)); in HandleShift()
2564 __ it(PL); in HandleShift()
2565 __ Lsr(o_l, high, temp, false, PL); in HandleShift()
2566 __ Lsr(o_h, high, o_h); in HandleShift()
2611 __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex()); in VisitNewInstance()
2631 __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex()); in VisitNewArray()
2668 __ mvn(out.AsRegister<Register>(), ShifterOperand(in.AsRegister<Register>())); in VisitNot()
2672 __ mvn(out.AsRegisterPairLow<Register>(), in VisitNot()
2674 __ mvn(out.AsRegisterPairHigh<Register>(), in VisitNot()
2694 __ eor(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(1)); in VisitBooleanNot()
2730 __ cmp(left.AsRegisterPairHigh<Register>(), in VisitCompare()
2732 __ b(&less, LT); in VisitCompare()
2733 __ b(&greater, GT); in VisitCompare()
2735 __ LoadImmediate(out, 0); in VisitCompare()
2736 __ cmp(left.AsRegisterPairLow<Register>(), in VisitCompare()
2742 __ LoadImmediate(out, 0); in VisitCompare()
2744 __ vcmps(left.AsFpuRegister<SRegister>(), right.AsFpuRegister<SRegister>()); in VisitCompare()
2746 __ vcmpd(FromLowSToD(left.AsFpuRegisterPairLow<SRegister>()), in VisitCompare()
2749 __ vmstat(); // transfer FP status register to ARM APSR. in VisitCompare()
2750 __ b(compare->IsGtBias() ? &greater : &less, VS); // VS for unordered. in VisitCompare()
2756 __ b(&done, EQ); in VisitCompare()
2757 __ b(&less, CC); // CC is for both: unsigned compare for longs and 'less than' for floats. in VisitCompare()
2759 __ Bind(&greater); in VisitCompare()
2760 __ LoadImmediate(out, 1); in VisitCompare()
2761 __ b(&done); in VisitCompare()
2763 __ Bind(&less); in VisitCompare()
2764 __ LoadImmediate(out, -1); in VisitCompare()
2766 __ Bind(&done); in VisitCompare()
2800 __ dmb(flavour); in GenerateMemoryBarrier()
2808 __ LoadImmediate(out_lo, offset); in GenerateWideAtomicLoad()
2809 __ add(IP, addr, ShifterOperand(out_lo)); in GenerateWideAtomicLoad()
2812 __ ldrexd(out_lo, out_hi, addr); in GenerateWideAtomicLoad()
2824 __ LoadImmediate(temp1, offset); in GenerateWideAtomicStore()
2825 __ add(IP, addr, ShifterOperand(temp1)); in GenerateWideAtomicStore()
2828 __ Bind(&fail); in GenerateWideAtomicStore()
2831 __ ldrexd(temp1, temp2, addr); in GenerateWideAtomicStore()
2833 __ strexd(temp1, value_lo, value_hi, addr); in GenerateWideAtomicStore()
2834 __ cmp(temp1, ShifterOperand(0)); in GenerateWideAtomicStore()
2835 __ b(&fail, NE); in GenerateWideAtomicStore()
2899 __ StoreToOffset(kStoreByte, value.AsRegister<Register>(), base, offset); in HandleFieldSet()
2905 __ StoreToOffset(kStoreHalfword, value.AsRegister<Register>(), base, offset); in HandleFieldSet()
2911 __ StoreToOffset(kStoreWord, value.AsRegister<Register>(), base, offset); in HandleFieldSet()
2924 __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), base, offset); in HandleFieldSet()
2931 __ StoreSToOffset(value.AsFpuRegister<SRegister>(), base, offset); in HandleFieldSet()
2941 __ vmovrrd(value_reg_lo, value_reg_hi, value_reg); in HandleFieldSet()
2950 __ StoreDToOffset(value_reg, base, offset); in HandleFieldSet()
3020 __ LoadFromOffset(kLoadUnsignedByte, out.AsRegister<Register>(), base, offset); in HandleFieldGet()
3025 __ LoadFromOffset(kLoadSignedByte, out.AsRegister<Register>(), base, offset); in HandleFieldGet()
3030 __ LoadFromOffset(kLoadSignedHalfword, out.AsRegister<Register>(), base, offset); in HandleFieldGet()
3035 __ LoadFromOffset(kLoadUnsignedHalfword, out.AsRegister<Register>(), base, offset); in HandleFieldGet()
3041 __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), base, offset); in HandleFieldGet()
3051 __ LoadFromOffset(kLoadWordPair, out.AsRegisterPairLow<Register>(), base, offset); in HandleFieldGet()
3057 __ LoadSFromOffset(out.AsFpuRegister<SRegister>(), base, offset); in HandleFieldGet()
3068 __ vmovdrr(out_reg, lo, hi); in HandleFieldGet()
3070 __ LoadDFromOffset(out_reg, base, offset); in HandleFieldGet()
3138 __ LoadFromOffset(kLoadWord, IP, obj.AsRegister<Register>(), 0); in GenerateImplicitNullCheck()
3149 __ cmp(obj.AsRegister<Register>(), ShifterOperand(0)); in GenerateExplicitNullCheck()
3150 __ b(slow_path->GetEntryLabel(), EQ); in GenerateExplicitNullCheck()
3185 __ LoadFromOffset(kLoadUnsignedByte, out, obj, offset); in VisitArrayGet()
3187 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>())); in VisitArrayGet()
3188 __ LoadFromOffset(kLoadUnsignedByte, out, IP, data_offset); in VisitArrayGet()
3199 __ LoadFromOffset(kLoadSignedByte, out, obj, offset); in VisitArrayGet()
3201 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>())); in VisitArrayGet()
3202 __ LoadFromOffset(kLoadSignedByte, out, IP, data_offset); in VisitArrayGet()
3213 __ LoadFromOffset(kLoadSignedHalfword, out, obj, offset); in VisitArrayGet()
3215 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2)); in VisitArrayGet()
3216 __ LoadFromOffset(kLoadSignedHalfword, out, IP, data_offset); in VisitArrayGet()
3227 __ LoadFromOffset(kLoadUnsignedHalfword, out, obj, offset); in VisitArrayGet()
3229 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2)); in VisitArrayGet()
3230 __ LoadFromOffset(kLoadUnsignedHalfword, out, IP, data_offset); in VisitArrayGet()
3243 __ LoadFromOffset(kLoadWord, out, obj, offset); in VisitArrayGet()
3245 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArrayGet()
3246 __ LoadFromOffset(kLoadWord, out, IP, data_offset); in VisitArrayGet()
3257 __ LoadFromOffset(kLoadWordPair, out.AsRegisterPairLow<Register>(), obj, offset); in VisitArrayGet()
3259 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArrayGet()
3260 __ LoadFromOffset(kLoadWordPair, out.AsRegisterPairLow<Register>(), IP, data_offset); in VisitArrayGet()
3271 __ LoadSFromOffset(out.AsFpuRegister<SRegister>(), obj, offset); in VisitArrayGet()
3273 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArrayGet()
3274 __ LoadSFromOffset(out.AsFpuRegister<SRegister>(), IP, data_offset); in VisitArrayGet()
3285 __ LoadDFromOffset(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), obj, offset); in VisitArrayGet()
3287 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArrayGet()
3288 __ LoadDFromOffset(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()), IP, data_offset); in VisitArrayGet()
3348 __ StoreToOffset(kStoreByte, value, obj, offset); in VisitArraySet()
3350 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>())); in VisitArraySet()
3351 __ StoreToOffset(kStoreByte, value, IP, data_offset); in VisitArraySet()
3363 __ StoreToOffset(kStoreHalfword, value, obj, offset); in VisitArraySet()
3365 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2)); in VisitArraySet()
3366 __ StoreToOffset(kStoreHalfword, value, IP, data_offset); in VisitArraySet()
3379 __ StoreToOffset(kStoreWord, value, obj, offset); in VisitArraySet()
3382 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArraySet()
3383 __ StoreToOffset(kStoreWord, value, IP, data_offset); in VisitArraySet()
3408 __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), obj, offset); in VisitArraySet()
3410 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArraySet()
3411 __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), IP, data_offset); in VisitArraySet()
3422 __ StoreSToOffset(value.AsFpuRegister<SRegister>(), obj, offset); in VisitArraySet()
3424 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArraySet()
3425 __ StoreSToOffset(value.AsFpuRegister<SRegister>(), IP, data_offset); in VisitArraySet()
3436 __ StoreDToOffset(FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()), obj, offset); in VisitArraySet()
3438 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArraySet()
3439 __ StoreDToOffset(FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()), IP, data_offset); in VisitArraySet()
3468 __ LoadFromOffset(kLoadWord, out, obj, offset); in VisitArrayLength()
3491 __ cmp(index, ShifterOperand(length)); in VisitBoundsCheck()
3492 __ b(slow_path->GetEntryLabel(), CS); in VisitBoundsCheck()
3497 __ CompareAndBranchIfZero(value, &is_null); in MarkGCCard()
3498 __ LoadFromOffset(kLoadWord, card, TR, Thread::CardTableOffset<kArmWordSize>().Int32Value()); in MarkGCCard()
3499 __ Lsr(temp, object, gc::accounting::CardTable::kCardShift); in MarkGCCard()
3500 __ strb(card, Address(card, temp)); in MarkGCCard()
3501 __ Bind(&is_null); in MarkGCCard()
3556 __ LoadFromOffset( in GenerateSuspendCheck()
3558 __ cmp(IP, ShifterOperand(0)); in GenerateSuspendCheck()
3561 __ b(slow_path->GetEntryLabel(), NE); in GenerateSuspendCheck()
3562 __ Bind(slow_path->GetReturnLabel()); in GenerateSuspendCheck()
3564 __ b(codegen_->GetLabelOf(successor), EQ); in GenerateSuspendCheck()
3565 __ b(slow_path->GetEntryLabel()); in GenerateSuspendCheck()
3580 __ Mov(destination.AsRegister<Register>(), source.AsRegister<Register>()); in EmitMove()
3583 __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), in EmitMove()
3588 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), in EmitMove()
3591 __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex()); in EmitMove()
3594 __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex()); in EmitMove()
3595 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in EmitMove()
3599 __ vmovs(destination.AsFpuRegister<SRegister>(), source.AsFpuRegister<SRegister>()); in EmitMove()
3602 __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex()); in EmitMove()
3606 __ LoadDFromOffset(DTMP, SP, source.GetStackIndex()); in EmitMove()
3607 __ StoreDToOffset(DTMP, SP, destination.GetStackIndex()); in EmitMove()
3610 __ LoadFromOffset( in EmitMove()
3614 __ LoadDFromOffset(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()), in EmitMove()
3620 __ Mov(destination.AsRegisterPairLow<Register>(), source.AsRegisterPairLow<Register>()); in EmitMove()
3621 __ Mov(destination.AsRegisterPairHigh<Register>(), source.AsRegisterPairHigh<Register>()); in EmitMove()
3625 __ StoreToOffset( in EmitMove()
3630 __ vmovd(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()), in EmitMove()
3634 __ StoreDToOffset(FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()), in EmitMove()
3644 __ LoadImmediate(destination.AsRegister<Register>(), value); in EmitMove()
3647 __ LoadImmediate(IP, value); in EmitMove()
3648 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in EmitMove()
3653 __ LoadImmediate(destination.AsRegisterPairLow<Register>(), Low32Bits(value)); in EmitMove()
3654 __ LoadImmediate(destination.AsRegisterPairHigh<Register>(), High32Bits(value)); in EmitMove()
3657 __ LoadImmediate(IP, Low32Bits(value)); in EmitMove()
3658 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in EmitMove()
3659 __ LoadImmediate(IP, High32Bits(value)); in EmitMove()
3660 __ StoreToOffset(kStoreWord, IP, SP, destination.GetHighStackIndex(kArmWordSize)); in EmitMove()
3665 __ LoadDImmediate(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()), value); in EmitMove()
3669 __ LoadImmediate(IP, Low32Bits(int_value)); in EmitMove()
3670 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in EmitMove()
3671 __ LoadImmediate(IP, High32Bits(int_value)); in EmitMove()
3672 __ StoreToOffset(kStoreWord, IP, SP, destination.GetHighStackIndex(kArmWordSize)); in EmitMove()
3678 __ LoadSImmediate(destination.AsFpuRegister<SRegister>(), value); in EmitMove()
3681 __ LoadImmediate(IP, bit_cast<int32_t, float>(value)); in EmitMove()
3682 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in EmitMove()
3689 __ Mov(IP, reg); in Exchange()
3690 __ LoadFromOffset(kLoadWord, reg, SP, mem); in Exchange()
3691 __ StoreToOffset(kStoreWord, IP, SP, mem); in Exchange()
3697 __ LoadFromOffset(kLoadWord, static_cast<Register>(ensure_scratch.GetRegister()), in Exchange()
3699 __ LoadFromOffset(kLoadWord, IP, SP, mem2 + stack_offset); in Exchange()
3700 __ StoreToOffset(kStoreWord, static_cast<Register>(ensure_scratch.GetRegister()), in Exchange()
3702 __ StoreToOffset(kStoreWord, IP, SP, mem1 + stack_offset); in Exchange()
3713 __ Mov(IP, source.AsRegister<Register>()); in EmitSwap()
3714 __ Mov(source.AsRegister<Register>(), destination.AsRegister<Register>()); in EmitSwap()
3715 __ Mov(destination.AsRegister<Register>(), IP); in EmitSwap()
3723 __ vmovrs(IP, source.AsFpuRegister<SRegister>()); in EmitSwap()
3724 __ vmovs(source.AsFpuRegister<SRegister>(), destination.AsFpuRegister<SRegister>()); in EmitSwap()
3725 __ vmovsr(destination.AsFpuRegister<SRegister>(), IP); in EmitSwap()
3727 __ vmovdrr(DTMP, source.AsRegisterPairLow<Register>(), source.AsRegisterPairHigh<Register>()); in EmitSwap()
3728 __ Mov(source.AsRegisterPairLow<Register>(), destination.AsRegisterPairLow<Register>()); in EmitSwap()
3729 __ Mov(source.AsRegisterPairHigh<Register>(), destination.AsRegisterPairHigh<Register>()); in EmitSwap()
3730 __ vmovrrd(destination.AsRegisterPairLow<Register>(), in EmitSwap()
3741 __ vmovdrr(DTMP, low_reg, static_cast<Register>(low_reg + 1)); in EmitSwap()
3742 __ LoadFromOffset(kLoadWordPair, low_reg, SP, mem); in EmitSwap()
3743 __ StoreDToOffset(DTMP, SP, mem); in EmitSwap()
3747 __ vmovd(DTMP, first); in EmitSwap()
3748 __ vmovd(first, second); in EmitSwap()
3749 __ vmovd(second, DTMP); in EmitSwap()
3757 __ vmovd(DTMP, reg); in EmitSwap()
3758 __ LoadDFromOffset(reg, SP, mem); in EmitSwap()
3759 __ StoreDToOffset(DTMP, SP, mem); in EmitSwap()
3767 __ vmovrs(IP, reg); in EmitSwap()
3768 __ LoadSFromOffset(reg, SP, mem); in EmitSwap()
3769 __ StoreToOffset(kStoreWord, IP, SP, mem); in EmitSwap()
3779 __ Push(static_cast<Register>(reg)); in SpillScratch()
3783 __ Pop(static_cast<Register>(reg)); in RestoreScratch()
3801 __ LoadFromOffset(kLoadWord, out, out, ArtMethod::DeclaringClassOffset().Int32Value()); in VisitLoadClass()
3805 __ LoadFromOffset( in VisitLoadClass()
3807 __ LoadFromOffset(kLoadWord, out, out, CodeGenerator::GetCacheOffset(cls->GetTypeIndex())); in VisitLoadClass()
3812 __ cmp(out, ShifterOperand(0)); in VisitLoadClass()
3813 __ b(slow_path->GetEntryLabel(), EQ); in VisitLoadClass()
3817 __ Bind(slow_path->GetExitLabel()); in VisitLoadClass()
3842 __ LoadFromOffset(kLoadWord, IP, class_reg, mirror::Class::StatusOffset().Int32Value()); in GenerateClassInitializationCheck()
3843 __ cmp(IP, ShifterOperand(mirror::Class::kStatusInitialized)); in GenerateClassInitializationCheck()
3844 __ b(slow_path->GetEntryLabel(), LT); in GenerateClassInitializationCheck()
3847 __ dmb(ISH); in GenerateClassInitializationCheck()
3848 __ Bind(slow_path->GetExitLabel()); in GenerateClassInitializationCheck()
3863 __ LoadFromOffset(kLoadWord, out, out, ArtMethod::DeclaringClassOffset().Int32Value()); in VisitLoadString()
3864 __ LoadFromOffset(kLoadWord, out, out, mirror::Class::DexCacheStringsOffset().Int32Value()); in VisitLoadString()
3865 __ LoadFromOffset(kLoadWord, out, out, CodeGenerator::GetCacheOffset(load->GetStringIndex())); in VisitLoadString()
3866 __ cmp(out, ShifterOperand(0)); in VisitLoadString()
3867 __ b(slow_path->GetEntryLabel(), EQ); in VisitLoadString()
3868 __ Bind(slow_path->GetExitLabel()); in VisitLoadString()
3880 __ LoadFromOffset(kLoadWord, out, TR, offset); in VisitLoadException()
3881 __ LoadImmediate(IP, 0); in VisitLoadException()
3882 __ StoreToOffset(kStoreWord, IP, TR, offset); in VisitLoadException()
3920 __ cmp(obj, ShifterOperand(0)); in VisitInstanceOf()
3921 __ b(&zero, EQ); in VisitInstanceOf()
3924 __ LoadFromOffset(kLoadWord, out, obj, class_offset); in VisitInstanceOf()
3925 __ cmp(out, ShifterOperand(cls)); in VisitInstanceOf()
3928 __ b(&zero, NE); in VisitInstanceOf()
3929 __ LoadImmediate(out, 1); in VisitInstanceOf()
3930 __ b(&done); in VisitInstanceOf()
3937 __ b(slow_path->GetEntryLabel(), NE); in VisitInstanceOf()
3938 __ LoadImmediate(out, 1); in VisitInstanceOf()
3939 __ b(&done); in VisitInstanceOf()
3943 __ Bind(&zero); in VisitInstanceOf()
3944 __ LoadImmediate(out, 0); in VisitInstanceOf()
3948 __ Bind(slow_path->GetExitLabel()); in VisitInstanceOf()
3950 __ Bind(&done); in VisitInstanceOf()
3974 __ cmp(obj, ShifterOperand(0)); in VisitCheckCast()
3975 __ b(slow_path->GetExitLabel(), EQ); in VisitCheckCast()
3978 __ LoadFromOffset(kLoadWord, temp, obj, class_offset); in VisitCheckCast()
3979 __ cmp(temp, ShifterOperand(cls)); in VisitCheckCast()
3980 __ b(slow_path->GetEntryLabel(), NE); in VisitCheckCast()
3981 __ Bind(slow_path->GetExitLabel()); in VisitCheckCast()
4033 __ and_(out, first, ShifterOperand(second)); in HandleBitwiseOperation()
4035 __ orr(out, first, ShifterOperand(second)); in HandleBitwiseOperation()
4038 __ eor(out, first, ShifterOperand(second)); in HandleBitwiseOperation()
4046 __ and_(out.AsRegisterPairLow<Register>(), in HandleBitwiseOperation()
4049 __ and_(out.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
4053 __ orr(out.AsRegisterPairLow<Register>(), in HandleBitwiseOperation()
4056 __ orr(out.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
4061 __ eor(out.AsRegisterPairLow<Register>(), in HandleBitwiseOperation()
4064 __ eor(out.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
4083 __ LoadFromOffset(kLoadWord, temp, TR, invoke->GetStringInitOffset()); in GenerateStaticOrDirectCall()
4085 __ LoadFromOffset(kLoadWord, LR, temp, in GenerateStaticOrDirectCall()
4089 __ blx(LR); in GenerateStaticOrDirectCall()
4095 __ LoadFromOffset( in GenerateStaticOrDirectCall()
4098 __ LoadFromOffset( in GenerateStaticOrDirectCall()
4101 __ LoadFromOffset(kLoadWord, LR, temp, ArtMethod::EntryPointFromQuickCompiledCodeOffset( in GenerateStaticOrDirectCall()
4104 __ blx(LR); in GenerateStaticOrDirectCall()
4106 __ bl(GetFrameEntryLabel()); in GenerateStaticOrDirectCall()