Lines Matching refs:IsStackSlot

625       DCHECK(source.IsStackSlot());  in Move32()
634 DCHECK(source.IsStackSlot()); in Move32()
638 DCHECK(destination.IsStackSlot()) << destination; in Move32()
648 DCHECK(source.IsStackSlot()); in Move32()
730 } else if (location.IsStackSlot()) { in Move()
752 if (temp_location.IsStackSlot()) { in Move()
1284 if (receiver.IsStackSlot()) { in VisitInvokeVirtual()
1321 if (receiver.IsStackSlot()) { in VisitInvokeInterface()
1662 } else if (in.IsStackSlot()) { in VisitTypeConversion()
1792 } else if (in.IsStackSlot()) { in VisitTypeConversion()
1826 if (!in.IsDoubleStackSlot() || !out.IsStackSlot()) { in VisitTypeConversion()
1834 if (out.IsStackSlot()) { in VisitTypeConversion()
2135 DCHECK(second.IsStackSlot()); in VisitMul()
2243 if (source.IsStackSlot()) { in PushOntoFPStack()
2709 } else if (value.IsStackSlot()) { in VisitDivZeroCheck()
3005 if (location.IsStackSlot()) { in VisitParameterValue()
3530 } else if (obj.IsStackSlot()) { in GenerateExplicitNullCheck()
4061 DCHECK(destination.IsStackSlot()); in EmitMove()
4067 } else if (destination.IsStackSlot()) { in EmitMove()
4073 } else if (source.IsStackSlot()) { in EmitMove()
4079 DCHECK(destination.IsStackSlot()); in EmitMove()
4100 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
4120 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
4211 } else if (source.IsRegister() && destination.IsStackSlot()) { in EmitSwap()
4213 } else if (source.IsStackSlot() && destination.IsRegister()) { in EmitSwap()
4215 } else if (source.IsStackSlot() && destination.IsStackSlot()) { in EmitSwap()
4223 } else if (source.IsFpuRegister() && destination.IsStackSlot()) { in EmitSwap()
4225 } else if (destination.IsFpuRegister() && source.IsStackSlot()) { in EmitSwap()
4403 DCHECK(cls.IsStackSlot()) << cls; in VisitInstanceOf()
4463 DCHECK(cls.IsStackSlot()) << cls; in VisitCheckCast()