Lines Matching refs:first
1953 Location first = locations->InAt(0); in VisitAdd() local
1960 if (out.AsRegister<Register>() == first.AsRegister<Register>()) { in VisitAdd()
1964 first.AsRegister<Register>(), second.AsRegister<Register>(), TIMES_1, 0)); in VisitAdd()
1968 if (out.AsRegister<Register>() == first.AsRegister<Register>()) { in VisitAdd()
1971 __ leal(out.AsRegister<Register>(), Address(first.AsRegister<Register>(), value)); in VisitAdd()
1974 DCHECK(first.Equals(locations->Out())); in VisitAdd()
1975 __ addl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in VisitAdd()
1982 __ addl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in VisitAdd()
1983 __ adcl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in VisitAdd()
1985 __ addl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in VisitAdd()
1986 __ adcl(first.AsRegisterPairHigh<Register>(), in VisitAdd()
1991 __ addl(first.AsRegisterPairLow<Register>(), Immediate(Low32Bits(value))); in VisitAdd()
1992 __ adcl(first.AsRegisterPairHigh<Register>(), Immediate(High32Bits(value))); in VisitAdd()
1999 __ addss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitAdd()
2006 __ addsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitAdd()
2042 Location first = locations->InAt(0); in VisitSub() local
2044 DCHECK(first.Equals(locations->Out())); in VisitSub()
2048 __ subl(first.AsRegister<Register>(), second.AsRegister<Register>()); in VisitSub()
2050 __ subl(first.AsRegister<Register>(), in VisitSub()
2053 __ subl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in VisitSub()
2060 __ subl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in VisitSub()
2061 __ sbbl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in VisitSub()
2063 __ subl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in VisitSub()
2064 __ sbbl(first.AsRegisterPairHigh<Register>(), in VisitSub()
2069 __ subl(first.AsRegisterPairLow<Register>(), Immediate(Low32Bits(value))); in VisitSub()
2070 __ sbbl(first.AsRegisterPairHigh<Register>(), Immediate(High32Bits(value))); in VisitSub()
2076 __ subss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitSub()
2081 __ subsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitSub()
2123 Location first = locations->InAt(0); in VisitMul() local
2125 DCHECK(first.Equals(locations->Out())); in VisitMul()
2130 __ imull(first.AsRegister<Register>(), second.AsRegister<Register>()); in VisitMul()
2133 __ imull(first.AsRegister<Register>(), imm); in VisitMul()
2136 __ imull(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in VisitMul()
2142 Register in1_hi = first.AsRegisterPairHigh<Register>(); in VisitMul()
2143 Register in1_lo = first.AsRegisterPairLow<Register>(); in VisitMul()
2224 __ mulss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitMul()
2229 __ mulsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitMul()
2284 Location first = locations->InAt(0); in GenerateRemFP() local
2295 PushOntoFPStack(first, 0, 2 * elem_size, /* is_fp */ true, is_wide); in GenerateRemFP()
2465 Location first = locations->InAt(0); in GenerateDivRemIntegral() local
2471 DCHECK_EQ(EAX, first.AsRegister<Register>()); in GenerateDivRemIntegral()
2512 DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegisterPairLow<Register>()); in GenerateDivRemIntegral()
2513 DCHECK_EQ(calling_convention.GetRegisterAt(1), first.AsRegisterPairHigh<Register>()); in GenerateDivRemIntegral()
2584 Location first = locations->InAt(0); in VisitDiv() local
2595 DCHECK(first.Equals(out)); in VisitDiv()
2596 __ divss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitDiv()
2601 DCHECK(first.Equals(out)); in VisitDiv()
2602 __ divsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitDiv()
2764 Location first = locations->InAt(0); in HandleShift() local
2766 DCHECK(first.Equals(locations->Out())); in HandleShift()
2770 DCHECK(first.IsRegister()); in HandleShift()
2771 Register first_reg = first.AsRegister<Register>(); in HandleShift()
2803 GenerateShlLong(first, second_reg); in HandleShift()
2805 GenerateShrLong(first, second_reg); in HandleShift()
2807 GenerateUShrLong(first, second_reg); in HandleShift()
2815 GenerateShlLong(first, shift); in HandleShift()
2817 GenerateShrLong(first, shift); in HandleShift()
2819 GenerateUShrLong(first, shift); in HandleShift()
4513 Location first = locations->InAt(0); in HandleBitwiseOperation() local
4515 DCHECK(first.Equals(locations->Out())); in HandleBitwiseOperation()
4520 __ andl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation()
4522 __ orl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation()
4525 __ xorl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation()
4529 __ andl(first.AsRegister<Register>(), in HandleBitwiseOperation()
4532 __ orl(first.AsRegister<Register>(), in HandleBitwiseOperation()
4536 __ xorl(first.AsRegister<Register>(), in HandleBitwiseOperation()
4541 __ andl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
4543 __ orl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
4546 __ xorl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
4553 __ andl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation()
4554 __ andl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation()
4556 __ orl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation()
4557 __ orl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation()
4560 __ xorl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation()
4561 __ xorl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation()
4565 __ andl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
4566 __ andl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
4569 __ orl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
4570 __ orl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
4574 __ xorl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
4575 __ xorl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
4585 Register first_low = first.AsRegisterPairLow<Register>(); in HandleBitwiseOperation()
4586 Register first_high = first.AsRegisterPairHigh<Register>(); in HandleBitwiseOperation()