121   CHECK_NE(rn, PC);  // Reserve tst pc instruction for exception handler marker.  in tst()
127   CHECK_NE(rn, PC);  // Reserve teq pc instruction for exception handler marker.  in teq()
673   EmitDataProcessing(AL, TST, 1, PC, R0, ShifterOperand(0));  in MarkExceptionHandler()
816     case TST: thumb_opcode =  0U /* 0b0000 */; set_cc = true; rd = PC; break;  in Emit32BitDataProcessing()
817     case TEQ: thumb_opcode =  4U /* 0b0100 */; set_cc = true; rd = PC; break;  in Emit32BitDataProcessing()
818     case CMP: thumb_opcode = 13U /* 0b1101 */; set_cc = true; rd = PC; break;  in Emit32BitDataProcessing()
819     case CMN: thumb_opcode =  8U /* 0b1000 */; set_cc = true; rd = PC; break;  in Emit32BitDataProcessing()
821     case MOV: thumb_opcode =  2U /* 0b0010 */; rn = PC; break;  in Emit32BitDataProcessing()
823     case MVN: thumb_opcode =  3U /* 0b0011 */; rn = PC; break;  in Emit32BitDataProcessing()
1374   if (IsHighRegister(rn) && rn != SP && rn != PC) {  in EmitLoadStore()
1468     if (ad.GetRegister() == PC) {  in EmitLoadStore()
1532       (regs & 0xff00 & ~(1 << (load ? PC : LR))) == 0) {  in EmitMultiMemOp()
1535         ((regs & (1 << (load ? PC : LR))) != 0 ? B8 : 0) | (regs & 0x00ff);  in EmitMultiMemOp()
1573       CHECK_EQ((regs & (1 << PC | 1 << SP)), 0);  in EmitMultiMemOp()
1640   CHECK_NE(rd, PC);  in clz()
1641   CHECK_NE(rm, PC);  in clz()
1809   CHECK_NE(rt, PC);  in vmovsr()
1824   CHECK_NE(rt, PC);  in vmovrs()
1841   CHECK_NE(rt, PC);  in vmovsrr()
1844   CHECK_NE(rt2, PC);  in vmovsrr()
1862   CHECK_NE(rt, PC);  in vmovrrs()
1865   CHECK_NE(rt2, PC);  in vmovrrs()
1883   CHECK_NE(rt, PC);  in vmovdrr()
1886   CHECK_NE(rt2, PC);  in vmovdrr()
1903   CHECK_NE(rt, PC);  in vmovrrd()
1906   CHECK_NE(rt2, PC);  in vmovrrd()
1934   CHECK_NE(static_cast<Register>(addr.encodingArm() & (0xf << kRnShift)), PC);  in vstrs()
1961   CHECK_NE(static_cast<Register>(addr.encodingArm() & (0xf << kRnShift)), PC);  in vstrd()
2090       (static_cast<int32_t>(PC)*B12) |  in vmstat()