42 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) {  in EmitR()  function in art::mips::MipsAssembler
164   EmitR(0, rs, rt, rd, 0, 0x20);  in Add()
168   EmitR(0, rs, rt, rd, 0, 0x21);  in Addu()
180   EmitR(0, rs, rt, rd, 0, 0x22);  in Sub()
184   EmitR(0, rs, rt, rd, 0, 0x23);  in Subu()
188   EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x18);  in Mult()
192   EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x19);  in Multu()
196   EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1a);  in Div()
200   EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1b);  in Divu()
204   EmitR(0, rs, rt, rd, 0, 0x24);  in And()
212   EmitR(0, rs, rt, rd, 0, 0x25);  in Or()
220   EmitR(0, rs, rt, rd, 0, 0x26);  in Xor()
228   EmitR(0, rs, rt, rd, 0, 0x27);  in Nor()
232   EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x00);  in Sll()
236   EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x02);  in Srl()
240   EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x03);  in Sra()
244   EmitR(0, rs, rt, rd, 0, 0x04);  in Sllv()
248   EmitR(0, rs, rt, rd, 0, 0x06);  in Srlv()
252   EmitR(0, rs, rt, rd, 0, 0x07);  in Srav()
280   EmitR(0, static_cast<Register>(0), static_cast<Register>(0), rd, 0, 0x10);  in Mfhi()
284   EmitR(0, static_cast<Register>(0), static_cast<Register>(0), rd, 0, 0x12);  in Mflo()
300   EmitR(0, rs, rt, rd, 0, 0x2a);  in Slt()
304   EmitR(0, rs, rt, rd, 0, 0x2b);  in Sltu()
336   EmitR(0, rs, static_cast<Register>(0), static_cast<Register>(0), 0, 0x09);  // Jalr zero, rs  in Jr()
341   EmitR(0, rs, static_cast<Register>(0), RA, 0, 0x09);  in Jalr()
415   EmitR(0, static_cast<Register>(0), static_cast<Register>(0),  in Break()
420   EmitR(0x0, static_cast<Register>(0), static_cast<Register>(0), static_cast<Register>(0), 0, 0x0);  in Nop()
428   EmitR(0, static_cast<Register>(0), static_cast<Register>(0), rt, 0, 0x20);  in Clear()
432   EmitR(0, static_cast<Register>(0), rs, rt, 0, 0x27);  in Not()