Lines Matching refs:rs
42 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { in EmitR() argument
43 CHECK_NE(rs, kNoRegister); in EmitR()
47 static_cast<int32_t>(rs) << kRsShift | in EmitR()
55 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI() argument
56 CHECK_NE(rs, kNoRegister); in EmitI()
59 static_cast<int32_t>(rs) << kRsShift | in EmitI()
93 void MipsAssembler::EmitBranch(Register rt, Register rs, Label* label, bool equal) { in EmitBranch() argument
103 Beq(rt, rs, (offset >> 2) & kBranchOffsetMask); in EmitBranch()
105 Bne(rt, rs, (offset >> 2) & kBranchOffsetMask); in EmitBranch()
163 void MipsAssembler::Add(Register rd, Register rs, Register rt) { in Add() argument
164 EmitR(0, rs, rt, rd, 0, 0x20); in Add()
167 void MipsAssembler::Addu(Register rd, Register rs, Register rt) { in Addu() argument
168 EmitR(0, rs, rt, rd, 0, 0x21); in Addu()
171 void MipsAssembler::Addi(Register rt, Register rs, uint16_t imm16) { in Addi() argument
172 EmitI(0x8, rs, rt, imm16); in Addi()
175 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) { in Addiu() argument
176 EmitI(0x9, rs, rt, imm16); in Addiu()
179 void MipsAssembler::Sub(Register rd, Register rs, Register rt) { in Sub() argument
180 EmitR(0, rs, rt, rd, 0, 0x22); in Sub()
183 void MipsAssembler::Subu(Register rd, Register rs, Register rt) { in Subu() argument
184 EmitR(0, rs, rt, rd, 0, 0x23); in Subu()
187 void MipsAssembler::Mult(Register rs, Register rt) { in Mult() argument
188 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x18); in Mult()
191 void MipsAssembler::Multu(Register rs, Register rt) { in Multu() argument
192 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x19); in Multu()
195 void MipsAssembler::Div(Register rs, Register rt) { in Div() argument
196 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1a); in Div()
199 void MipsAssembler::Divu(Register rs, Register rt) { in Divu() argument
200 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1b); in Divu()
203 void MipsAssembler::And(Register rd, Register rs, Register rt) { in And() argument
204 EmitR(0, rs, rt, rd, 0, 0x24); in And()
207 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) { in Andi() argument
208 EmitI(0xc, rs, rt, imm16); in Andi()
211 void MipsAssembler::Or(Register rd, Register rs, Register rt) { in Or() argument
212 EmitR(0, rs, rt, rd, 0, 0x25); in Or()
215 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) { in Ori() argument
216 EmitI(0xd, rs, rt, imm16); in Ori()
219 void MipsAssembler::Xor(Register rd, Register rs, Register rt) { in Xor() argument
220 EmitR(0, rs, rt, rd, 0, 0x26); in Xor()
223 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) { in Xori() argument
224 EmitI(0xe, rs, rt, imm16); in Xori()
227 void MipsAssembler::Nor(Register rd, Register rs, Register rt) { in Nor() argument
228 EmitR(0, rs, rt, rd, 0, 0x27); in Nor()
231 void MipsAssembler::Sll(Register rd, Register rs, int shamt) { in Sll() argument
232 EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x00); in Sll()
235 void MipsAssembler::Srl(Register rd, Register rs, int shamt) { in Srl() argument
236 EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x02); in Srl()
239 void MipsAssembler::Sra(Register rd, Register rs, int shamt) { in Sra() argument
240 EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x03); in Sra()
243 void MipsAssembler::Sllv(Register rd, Register rs, Register rt) { in Sllv() argument
244 EmitR(0, rs, rt, rd, 0, 0x04); in Sllv()
247 void MipsAssembler::Srlv(Register rd, Register rs, Register rt) { in Srlv() argument
248 EmitR(0, rs, rt, rd, 0, 0x06); in Srlv()
251 void MipsAssembler::Srav(Register rd, Register rs, Register rt) { in Srav() argument
252 EmitR(0, rs, rt, rd, 0, 0x07); in Srav()
255 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) { in Lb() argument
256 EmitI(0x20, rs, rt, imm16); in Lb()
259 void MipsAssembler::Lh(Register rt, Register rs, uint16_t imm16) { in Lh() argument
260 EmitI(0x21, rs, rt, imm16); in Lh()
263 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) { in Lw() argument
264 EmitI(0x23, rs, rt, imm16); in Lw()
267 void MipsAssembler::Lbu(Register rt, Register rs, uint16_t imm16) { in Lbu() argument
268 EmitI(0x24, rs, rt, imm16); in Lbu()
271 void MipsAssembler::Lhu(Register rt, Register rs, uint16_t imm16) { in Lhu() argument
272 EmitI(0x25, rs, rt, imm16); in Lhu()
287 void MipsAssembler::Sb(Register rt, Register rs, uint16_t imm16) { in Sb() argument
288 EmitI(0x28, rs, rt, imm16); in Sb()
291 void MipsAssembler::Sh(Register rt, Register rs, uint16_t imm16) { in Sh() argument
292 EmitI(0x29, rs, rt, imm16); in Sh()
295 void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16) { in Sw() argument
296 EmitI(0x2b, rs, rt, imm16); in Sw()
299 void MipsAssembler::Slt(Register rd, Register rs, Register rt) { in Slt() argument
300 EmitR(0, rs, rt, rd, 0, 0x2a); in Slt()
303 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) { in Sltu() argument
304 EmitR(0, rs, rt, rd, 0, 0x2b); in Sltu()
307 void MipsAssembler::Slti(Register rt, Register rs, uint16_t imm16) { in Slti() argument
308 EmitI(0xa, rs, rt, imm16); in Slti()
311 void MipsAssembler::Sltiu(Register rt, Register rs, uint16_t imm16) { in Sltiu() argument
312 EmitI(0xb, rs, rt, imm16); in Sltiu()
315 void MipsAssembler::Beq(Register rt, Register rs, uint16_t imm16) { in Beq() argument
316 EmitI(0x4, rs, rt, imm16); in Beq()
320 void MipsAssembler::Bne(Register rt, Register rs, uint16_t imm16) { in Bne() argument
321 EmitI(0x5, rs, rt, imm16); in Bne()
335 void MipsAssembler::Jr(Register rs) { in Jr() argument
336 EmitR(0, rs, static_cast<Register>(0), static_cast<Register>(0), 0, 0x09); // Jalr zero, rs in Jr()
340 void MipsAssembler::Jalr(Register rs) { in Jalr() argument
341 EmitR(0, rs, static_cast<Register>(0), RA, 0, 0x09); in Jalr()
394 void MipsAssembler::Mtc1(FRegister ft, Register rs) { in Mtc1() argument
395 EmitFR(0x11, 0x04, ft, static_cast<FRegister>(rs), static_cast<FRegister>(0), 0x0); in Mtc1()
398 void MipsAssembler::Lwc1(FRegister ft, Register rs, uint16_t imm16) { in Lwc1() argument
399 EmitI(0x31, rs, static_cast<Register>(ft), imm16); in Lwc1()
402 void MipsAssembler::Ldc1(DRegister ft, Register rs, uint16_t imm16) { in Ldc1() argument
403 EmitI(0x35, rs, static_cast<Register>(ft), imm16); in Ldc1()
406 void MipsAssembler::Swc1(FRegister ft, Register rs, uint16_t imm16) { in Swc1() argument
407 EmitI(0x39, rs, static_cast<Register>(ft), imm16); in Swc1()
410 void MipsAssembler::Sdc1(DRegister ft, Register rs, uint16_t imm16) { in Sdc1() argument
411 EmitI(0x3d, rs, static_cast<Register>(ft), imm16); in Sdc1()
423 void MipsAssembler::Move(Register rt, Register rs) { in Move() argument
424 EmitI(0x9, rs, rt, 0); // Addiu in Move()
431 void MipsAssembler::Not(Register rt, Register rs) { in Not() argument
432 EmitR(0, static_cast<Register>(0), rs, rt, 0, 0x27); in Not()
435 void MipsAssembler::Mul(Register rd, Register rs, Register rt) { in Mul() argument
436 Mult(rs, rt); in Mul()
440 void MipsAssembler::Div(Register rd, Register rs, Register rt) { in Div() argument
441 Div(rs, rt); in Div()
445 void MipsAssembler::Rem(Register rd, Register rs, Register rt) { in Rem() argument
446 Div(rs, rt); in Rem()
450 void MipsAssembler::AddConstant(Register rt, Register rs, int32_t value) { in AddConstant() argument
451 Addiu(rt, rs, value); in AddConstant()