Lines Matching refs:CpuRegister
27 std::ostream& operator<<(std::ostream& os, const CpuRegister& reg) { in operator <<()
39 void X86_64Assembler::call(CpuRegister reg) { in call()
63 void X86_64Assembler::pushq(CpuRegister reg) { in pushq()
91 void X86_64Assembler::popq(CpuRegister reg) { in popq()
106 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq()
122 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl()
141 void X86_64Assembler::movq(CpuRegister dst, CpuRegister src) { in movq()
150 void X86_64Assembler::movl(CpuRegister dst, CpuRegister src) { in movl()
158 void X86_64Assembler::movq(CpuRegister dst, const Address& src) { in movq()
166 void X86_64Assembler::movl(CpuRegister dst, const Address& src) { in movl()
174 void X86_64Assembler::movq(const Address& dst, CpuRegister src) { in movq()
182 void X86_64Assembler::movl(const Address& dst, CpuRegister src) { in movl()
198 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { in cmov()
202 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov()
211 void X86_64Assembler::movzxb(CpuRegister dst, CpuRegister src) { in movzxb()
220 void X86_64Assembler::movzxb(CpuRegister dst, const Address& src) { in movzxb()
231 void X86_64Assembler::movsxb(CpuRegister dst, CpuRegister src) { in movsxb()
240 void X86_64Assembler::movsxb(CpuRegister dst, const Address& src) { in movsxb()
251 void X86_64Assembler::movb(CpuRegister /*dst*/, const Address& /*src*/) { in movb() argument
256 void X86_64Assembler::movb(const Address& dst, CpuRegister src) { in movb()
274 void X86_64Assembler::movzxw(CpuRegister dst, CpuRegister src) { in movzxw()
283 void X86_64Assembler::movzxw(CpuRegister dst, const Address& src) { in movzxw()
292 void X86_64Assembler::movsxw(CpuRegister dst, CpuRegister src) { in movsxw()
301 void X86_64Assembler::movsxw(CpuRegister dst, const Address& src) { in movsxw()
310 void X86_64Assembler::movw(CpuRegister /*dst*/, const Address& /*src*/) { in movw() argument
315 void X86_64Assembler::movw(const Address& dst, CpuRegister src) { in movw()
336 void X86_64Assembler::leaq(CpuRegister dst, const Address& src) { in leaq()
344 void X86_64Assembler::leal(CpuRegister dst, const Address& src) { in leal()
391 void X86_64Assembler::movsxd(CpuRegister dst, CpuRegister src) { in movsxd()
399 void X86_64Assembler::movsxd(CpuRegister dst, const Address& src) { in movsxd()
407 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src) { in movd()
411 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src) { in movd()
415 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd()
424 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd()
645 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src) { in cvtsi2ss()
650 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss()
680 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src) { in cvtsi2sd()
685 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2sd()
715 void X86_64Assembler::cvtss2si(CpuRegister dst, XmmRegister src) { in cvtss2si()
745 void X86_64Assembler::cvtsd2si(CpuRegister dst, XmmRegister src) { in cvtsd2si()
755 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src) { in cvttss2si()
760 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttss2si()
775 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src) { in cvttsd2si()
780 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttsd2si()
1146 void X86_64Assembler::xchgl(CpuRegister dst, CpuRegister src) { in xchgl()
1166 void X86_64Assembler::xchgq(CpuRegister dst, CpuRegister src) { in xchgq()
1191 void X86_64Assembler::xchgl(CpuRegister reg, const Address& address) { in xchgl()
1207 void X86_64Assembler::cmpl(CpuRegister reg, const Immediate& imm) { in cmpl()
1214 void X86_64Assembler::cmpl(CpuRegister reg0, CpuRegister reg1) { in cmpl()
1222 void X86_64Assembler::cmpl(CpuRegister reg, const Address& address) { in cmpl()
1230 void X86_64Assembler::cmpl(const Address& address, CpuRegister reg) { in cmpl()
1245 void X86_64Assembler::cmpq(CpuRegister reg0, CpuRegister reg1) { in cmpq()
1253 void X86_64Assembler::cmpq(CpuRegister reg, const Immediate& imm) { in cmpq()
1261 void X86_64Assembler::cmpq(CpuRegister reg, const Address& address) { in cmpq()
1277 void X86_64Assembler::addl(CpuRegister dst, CpuRegister src) { in addl()
1285 void X86_64Assembler::addl(CpuRegister reg, const Address& address) { in addl()
1293 void X86_64Assembler::testl(CpuRegister reg1, CpuRegister reg2) { in testl()
1301 void X86_64Assembler::testl(CpuRegister reg, const Address& address) { in testl()
1309 void X86_64Assembler::testl(CpuRegister reg, const Immediate& immediate) { in testl()
1335 void X86_64Assembler::testq(CpuRegister reg1, CpuRegister reg2) { in testq()
1343 void X86_64Assembler::testq(CpuRegister reg, const Address& address) { in testq()
1351 void X86_64Assembler::andl(CpuRegister dst, CpuRegister src) { in andl()
1359 void X86_64Assembler::andl(CpuRegister reg, const Address& address) { in andl()
1367 void X86_64Assembler::andl(CpuRegister dst, const Immediate& imm) { in andl()
1374 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { in andq()
1382 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq()
1390 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq()
1398 void X86_64Assembler::orl(CpuRegister dst, CpuRegister src) { in orl()
1406 void X86_64Assembler::orl(CpuRegister reg, const Address& address) { in orl()
1414 void X86_64Assembler::orl(CpuRegister dst, const Immediate& imm) { in orl()
1421 void X86_64Assembler::orq(CpuRegister dst, const Immediate& imm) { in orq()
1429 void X86_64Assembler::orq(CpuRegister dst, CpuRegister src) { in orq()
1437 void X86_64Assembler::orq(CpuRegister dst, const Address& src) { in orq()
1445 void X86_64Assembler::xorl(CpuRegister dst, CpuRegister src) { in xorl()
1453 void X86_64Assembler::xorl(CpuRegister reg, const Address& address) { in xorl()
1461 void X86_64Assembler::xorl(CpuRegister dst, const Immediate& imm) { in xorl()
1468 void X86_64Assembler::xorq(CpuRegister dst, CpuRegister src) { in xorq()
1476 void X86_64Assembler::xorq(CpuRegister dst, const Immediate& imm) { in xorq()
1483 void X86_64Assembler::xorq(CpuRegister dst, const Address& src) { in xorq()
1544 void X86_64Assembler::addl(CpuRegister reg, const Immediate& imm) { in addl()
1551 void X86_64Assembler::addq(CpuRegister reg, const Immediate& imm) { in addq()
1559 void X86_64Assembler::addq(CpuRegister dst, const Address& address) { in addq()
1567 void X86_64Assembler::addq(CpuRegister dst, CpuRegister src) { in addq()
1576 void X86_64Assembler::addl(const Address& address, CpuRegister reg) { in addl()
1591 void X86_64Assembler::subl(CpuRegister dst, CpuRegister src) { in subl()
1599 void X86_64Assembler::subl(CpuRegister reg, const Immediate& imm) { in subl()
1606 void X86_64Assembler::subq(CpuRegister reg, const Immediate& imm) { in subq()
1614 void X86_64Assembler::subq(CpuRegister dst, CpuRegister src) { in subq()
1622 void X86_64Assembler::subq(CpuRegister reg, const Address& address) { in subq()
1630 void X86_64Assembler::subl(CpuRegister reg, const Address& address) { in subl()
1651 void X86_64Assembler::idivl(CpuRegister reg) { in idivl()
1659 void X86_64Assembler::idivq(CpuRegister reg) { in idivq()
1667 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src) { in imull()
1675 void X86_64Assembler::imull(CpuRegister reg, const Immediate& imm) { in imull()
1697 void X86_64Assembler::imull(CpuRegister reg, const Address& address) { in imull()
1706 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister src) { in imulq()
1715 void X86_64Assembler::imulq(CpuRegister reg, const Immediate& imm) { in imulq()
1719 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) { in imulq()
1740 void X86_64Assembler::imulq(CpuRegister reg, const Address& address) { in imulq()
1749 void X86_64Assembler::imull(CpuRegister reg) { in imull()
1757 void X86_64Assembler::imulq(CpuRegister reg) { in imulq()
1773 void X86_64Assembler::mull(CpuRegister reg) { in mull()
1789 void X86_64Assembler::shll(CpuRegister reg, const Immediate& imm) { in shll()
1794 void X86_64Assembler::shlq(CpuRegister reg, const Immediate& imm) { in shlq()
1799 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { in shll()
1804 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { in shlq()
1809 void X86_64Assembler::shrl(CpuRegister reg, const Immediate& imm) { in shrl()
1814 void X86_64Assembler::shrq(CpuRegister reg, const Immediate& imm) { in shrq()
1819 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { in shrl()
1824 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { in shrq()
1829 void X86_64Assembler::sarl(CpuRegister reg, const Immediate& imm) { in sarl()
1834 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { in sarl()
1839 void X86_64Assembler::sarq(CpuRegister reg, const Immediate& imm) { in sarq()
1844 void X86_64Assembler::sarq(CpuRegister operand, CpuRegister shifter) { in sarq()
1849 void X86_64Assembler::negl(CpuRegister reg) { in negl()
1857 void X86_64Assembler::negq(CpuRegister reg) { in negq()
1865 void X86_64Assembler::notl(CpuRegister reg) { in notl()
1873 void X86_64Assembler::notq(CpuRegister reg) { in notq()
1954 void X86_64Assembler::jmp(CpuRegister reg) { in jmp()
1996 void X86_64Assembler::cmpxchgl(const Address& address, CpuRegister reg) { in cmpxchgl()
2005 void X86_64Assembler::cmpxchgq(const Address& address, CpuRegister reg) { in cmpxchgq()
2030 void X86_64Assembler::AddImmediate(CpuRegister reg, const Immediate& imm) { in AddImmediate()
2042 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc()
2053 void X86_64Assembler::bswapl(CpuRegister dst) { in bswapl()
2060 void X86_64Assembler::bswapq(CpuRegister dst) { in bswapq()
2081 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant()
2082 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); in LoadDoubleConstant()
2146 } else if (operand.IsRegister(CpuRegister(RAX))) { in EmitComplex()
2179 CpuRegister reg, in EmitGenericShift()
2201 CpuRegister operand, in EmitGenericShift()
2202 CpuRegister shifter) { in EmitGenericShift()
2238 void X86_64Assembler::EmitOptionalRex32(CpuRegister reg) { in EmitOptionalRex32()
2242 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalRex32()
2250 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, XmmRegister src) { in EmitOptionalRex32()
2254 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, CpuRegister src) { in EmitOptionalRex32()
2265 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, const Operand& operand) { in EmitOptionalRex32()
2289 void X86_64Assembler::EmitRex64(CpuRegister reg) { in EmitRex64()
2299 void X86_64Assembler::EmitRex64(CpuRegister dst, CpuRegister src) { in EmitRex64()
2303 void X86_64Assembler::EmitRex64(XmmRegister dst, CpuRegister src) { in EmitRex64()
2307 void X86_64Assembler::EmitRex64(CpuRegister dst, XmmRegister src) { in EmitRex64()
2311 void X86_64Assembler::EmitRex64(CpuRegister dst, const Operand& operand) { in EmitRex64()
2327 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalByteRegNormalizingRex32()
2333 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) { in EmitOptionalByteRegNormalizingRex32()
2377 subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame()
2386 movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame()
2393 movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame()
2399 movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame()
2403 …movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegiste… in BuildFrame()
2407 …movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame()
2410 …movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame()
2427 movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame()
2434 addq(CpuRegister(RSP), Immediate(adjust)); in RemoveFrame()
2452 addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust))); in IncreaseFrameSize()
2458 addq(CpuRegister(RSP), Immediate(adjust)); in DecreaseFrameSize()
2469 movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store()
2472 movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store()
2476 movq(Address(CpuRegister(RSP), offs), src.AsRegisterPairLow()); in Store()
2477 movq(Address(CpuRegister(RSP), FrameOffset(offs.Int32Value()+4)), in Store()
2481 fstps(Address(CpuRegister(RSP), offs)); in Store()
2483 fstpl(Address(CpuRegister(RSP), offs)); in Store()
2488 movss(Address(CpuRegister(RSP), offs), src.AsXmmRegister()); in Store()
2490 movsd(Address(CpuRegister(RSP), offs), src.AsXmmRegister()); in Store()
2498 movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRef()
2504 movq(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRawPtr()
2509 movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq? in StoreImmediateToFrame()
2522 leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), fr_offs)); in StoreStackOffsetToThread64()
2527 gs()->movq(Address::Absolute(thr_offs, true), CpuRegister(RSP)); in StoreStackPointerToThread64()
2542 movl(dest.AsCpuRegister(), Address(CpuRegister(RSP), src)); in Load()
2545 movq(dest.AsCpuRegister(), Address(CpuRegister(RSP), src)); in Load()
2549 movq(dest.AsRegisterPairLow(), Address(CpuRegister(RSP), src)); in Load()
2550 movq(dest.AsRegisterPairHigh(), Address(CpuRegister(RSP), FrameOffset(src.Int32Value()+4))); in Load()
2553 flds(Address(CpuRegister(RSP), src)); in Load()
2555 fldl(Address(CpuRegister(RSP), src)); in Load()
2560 movss(dest.AsXmmRegister(), Address(CpuRegister(RSP), src)); in Load()
2562 movsd(dest.AsXmmRegister(), Address(CpuRegister(RSP), src)); in Load()
2596 movq(dest.AsCpuRegister(), Address(CpuRegister(RSP), src)); in LoadRef()
2652 subl(CpuRegister(RSP), Immediate(16)); in Move()
2655 fstps(Address(CpuRegister(RSP), 0)); in Move()
2656 movss(dest.AsXmmRegister(), Address(CpuRegister(RSP), 0)); in Move()
2659 fstpl(Address(CpuRegister(RSP), 0)); in Move()
2660 movsd(dest.AsXmmRegister(), Address(CpuRegister(RSP), 0)); in Move()
2662 addq(CpuRegister(RSP), Immediate(16)); in Move()
2673 movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), src)); in CopyRef()
2674 movl(Address(CpuRegister(RSP), dest), scratch.AsCpuRegister()); in CopyRef()
2718 pushq(Address(CpuRegister(RSP), src)); in Copy()
2724 CpuRegister scratch = mscratch.AsX86_64().AsCpuRegister(); in Copy()
2726 movq(scratch, Address(CpuRegister(RSP), src_base)); in Copy()
2728 movq(Address(CpuRegister(RSP), dest), scratch); in Copy()
2742 CpuRegister scratch = mscratch.AsX86_64().AsCpuRegister(); in Copy()
2745 movq(scratch, Address(CpuRegister(RSP), src)); in Copy()
2763 movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2775 leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2778 leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2790 movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2793 leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2796 leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2834 CpuRegister scratch = mscratch.AsX86_64().AsCpuRegister(); in Call()
2835 movq(scratch, Address(CpuRegister(RSP), base)); in Call()
2850 movq(Address(CpuRegister(RSP), offset), scratch.AsCpuRegister()); in GetCurrentThread()
2878 __ gs()->movq(CpuRegister(RDI), Address::Absolute(Thread::ExceptionOffset<8>(), true)); in Emit()