assembler_x86_64.h - OpenGrok cross reference for /art/compiler/utils/x86_64/assembler_x86

Lines Matching refs:CpuRegister
95   bool IsRegister(CpuRegister reg) const {  in IsRegister()
109   void SetModRM(uint8_t mod_in, CpuRegister rm_in) {  in SetModRM()
118   void SetSIB(ScaleFactor scale_in, CpuRegister index_in, CpuRegister base_in) {  in SetSIB()
154   explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); }  in Operand()
169   Address(CpuRegister base_in, int32_t disp) {  in Address()
173   Address(CpuRegister base_in, Offset disp) {  in Address()
177   Address(CpuRegister base_in, FrameOffset disp) {  in Address()
179     Init(CpuRegister(RSP), disp.Int32Value());  in Address()
182   Address(CpuRegister base_in, MemberOffset disp) {  in Address()
186   void Init(CpuRegister base_in, int32_t disp) {  in Init()
190         SetSIB(TIMES_1, CpuRegister(RSP), base_in);  in Init()
195         SetSIB(TIMES_1, CpuRegister(RSP), base_in);  in Init()
201         SetSIB(TIMES_1, CpuRegister(RSP), base_in);  in Init()
208   Address(CpuRegister index_in, ScaleFactor scale_in, int32_t disp) {  in Address()
210     SetModRM(0, CpuRegister(RSP));  in Address()
211     SetSIB(scale_in, index_in, CpuRegister(RBP));  in Address()
215   Address(CpuRegister base_in, CpuRegister index_in, ScaleFactor scale_in, int32_t disp) {  in Address()
218       SetModRM(0, CpuRegister(RSP));  in Address()
221       SetModRM(1, CpuRegister(RSP));  in Address()
225       SetModRM(2, CpuRegister(RSP));  in Address()
235       result.SetModRM(0, CpuRegister(RSP));
236       result.SetSIB(TIMES_1, CpuRegister(RSP), CpuRegister(RBP));
241       result.SetModRM(0, CpuRegister(RBP));
252     result.SetModRM(0, CpuRegister(RBP));  in RIP()
313   void call(CpuRegister reg);
317   void pushq(CpuRegister reg);
321   void popq(CpuRegister reg);
324   void movq(CpuRegister dst, const Immediate& src);
325   void movl(CpuRegister dst, const Immediate& src);
326   void movq(CpuRegister dst, CpuRegister src);
327   void movl(CpuRegister dst, CpuRegister src);
329   void movq(CpuRegister dst, const Address& src);
330   void movl(CpuRegister dst, const Address& src);
331   void movq(const Address& dst, CpuRegister src);
333   void movl(const Address& dst, CpuRegister src);
336   void cmov(Condition c, CpuRegister dst, CpuRegister src);  // This is the 64b version.
337   void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
339   void movzxb(CpuRegister dst, CpuRegister src);
340   void movzxb(CpuRegister dst, const Address& src);
341   void movsxb(CpuRegister dst, CpuRegister src);
342   void movsxb(CpuRegister dst, const Address& src);
343   void movb(CpuRegister dst, const Address& src);
344   void movb(const Address& dst, CpuRegister src);
347   void movzxw(CpuRegister dst, CpuRegister src);
348   void movzxw(CpuRegister dst, const Address& src);
349   void movsxw(CpuRegister dst, CpuRegister src);
350   void movsxw(CpuRegister dst, const Address& src);
351   void movw(CpuRegister dst, const Address& src);
352   void movw(const Address& dst, CpuRegister src);
355   void leaq(CpuRegister dst, const Address& src);
356   void leal(CpuRegister dst, const Address& src);
364   void movsxd(CpuRegister dst, CpuRegister src);
365   void movsxd(CpuRegister dst, const Address& src);
367   void movd(XmmRegister dst, CpuRegister src);  // Note: this is the r64 version, formally movq.
368   void movd(CpuRegister dst, XmmRegister src);  // Note: this is the r64 version, formally movq.
369   void movd(XmmRegister dst, CpuRegister src, bool is64bit);
370   void movd(CpuRegister dst, XmmRegister src, bool is64bit);
394   void cvtsi2ss(XmmRegister dst, CpuRegister src);  // Note: this is the r/m32 version.
395   void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
397   void cvtsi2sd(XmmRegister dst, CpuRegister src);  // Note: this is the r/m32 version.
398   void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
401   void cvtss2si(CpuRegister dst, XmmRegister src);  // Note: this is the r32 version.
405   void cvtsd2si(CpuRegister dst, XmmRegister src);  // Note: this is the r32 version.
409   void cvttss2si(CpuRegister dst, XmmRegister src);  // Note: this is the r32 version.
410   void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
411   void cvttsd2si(CpuRegister dst, XmmRegister src);  // Note: this is the r32 version.
412   void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
471   void xchgl(CpuRegister dst, CpuRegister src);
472   void xchgq(CpuRegister dst, CpuRegister src);
473   void xchgl(CpuRegister reg, const Address& address);
477   void cmpl(CpuRegister reg, const Immediate& imm);
478   void cmpl(CpuRegister reg0, CpuRegister reg1);
479   void cmpl(CpuRegister reg, const Address& address);
480   void cmpl(const Address& address, CpuRegister reg);
483   void cmpq(CpuRegister reg0, CpuRegister reg1);
484   void cmpq(CpuRegister reg0, const Immediate& imm);
485   void cmpq(CpuRegister reg0, const Address& address);
488   void testl(CpuRegister reg1, CpuRegister reg2);
489   void testl(CpuRegister reg, const Address& address);
490   void testl(CpuRegister reg, const Immediate& imm);
492   void testq(CpuRegister reg1, CpuRegister reg2);
493   void testq(CpuRegister reg, const Address& address);
495   void andl(CpuRegister dst, const Immediate& imm);
496   void andl(CpuRegister dst, CpuRegister src);
497   void andl(CpuRegister reg, const Address& address);
498   void andq(CpuRegister dst, const Immediate& imm);
499   void andq(CpuRegister dst, CpuRegister src);
500   void andq(CpuRegister reg, const Address& address);
502   void orl(CpuRegister dst, const Immediate& imm);
503   void orl(CpuRegister dst, CpuRegister src);
504   void orl(CpuRegister reg, const Address& address);
505   void orq(CpuRegister dst, CpuRegister src);
506   void orq(CpuRegister dst, const Immediate& imm);
507   void orq(CpuRegister reg, const Address& address);
509   void xorl(CpuRegister dst, CpuRegister src);
510   void xorl(CpuRegister dst, const Immediate& imm);
511   void xorl(CpuRegister reg, const Address& address);
512   void xorq(CpuRegister dst, const Immediate& imm);
513   void xorq(CpuRegister dst, CpuRegister src);
514   void xorq(CpuRegister reg, const Address& address);
516   void addl(CpuRegister dst, CpuRegister src);
517   void addl(CpuRegister reg, const Immediate& imm);
518   void addl(CpuRegister reg, const Address& address);
519   void addl(const Address& address, CpuRegister reg);
522   void addq(CpuRegister reg, const Immediate& imm);
523   void addq(CpuRegister dst, CpuRegister src);
524   void addq(CpuRegister dst, const Address& address);
526   void subl(CpuRegister dst, CpuRegister src);
527   void subl(CpuRegister reg, const Immediate& imm);
528   void subl(CpuRegister reg, const Address& address);
530   void subq(CpuRegister reg, const Immediate& imm);
531   void subq(CpuRegister dst, CpuRegister src);
532   void subq(CpuRegister dst, const Address& address);
537   void idivl(CpuRegister reg);
538   void idivq(CpuRegister reg);
540   void imull(CpuRegister dst, CpuRegister src);
541   void imull(CpuRegister reg, const Immediate& imm);
542   void imull(CpuRegister reg, const Address& address);
544   void imulq(CpuRegister src);
545   void imulq(CpuRegister dst, CpuRegister src);
546   void imulq(CpuRegister reg, const Immediate& imm);
547   void imulq(CpuRegister reg, const Address& address);
548   void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
550   void imull(CpuRegister reg);
553   void mull(CpuRegister reg);
556   void shll(CpuRegister reg, const Immediate& imm);
557   void shll(CpuRegister operand, CpuRegister shifter);
558   void shrl(CpuRegister reg, const Immediate& imm);
559   void shrl(CpuRegister operand, CpuRegister shifter);
560   void sarl(CpuRegister reg, const Immediate& imm);
561   void sarl(CpuRegister operand, CpuRegister shifter);
563   void shlq(CpuRegister reg, const Immediate& imm);
564   void shlq(CpuRegister operand, CpuRegister shifter);
565   void shrq(CpuRegister reg, const Immediate& imm);
566   void shrq(CpuRegister operand, CpuRegister shifter);
567   void sarq(CpuRegister reg, const Immediate& imm);
568   void sarq(CpuRegister operand, CpuRegister shifter);
570   void negl(CpuRegister reg);
571   void negq(CpuRegister reg);
573   void notl(CpuRegister reg);
574   void notq(CpuRegister reg);
588   void jmp(CpuRegister reg);
593   void cmpxchgl(const Address& address, CpuRegister reg);
594   void cmpxchgq(const Address& address, CpuRegister reg);
600   void setcc(Condition condition, CpuRegister dst);
602   void bswapl(CpuRegister dst);
603   void bswapq(CpuRegister dst);
611   void AddImmediate(CpuRegister reg, const Immediate& imm);
615   void LockCmpxchgl(const Address& address, CpuRegister reg) {  in LockCmpxchgl()
619   void LockCmpxchgq(const Address& address, CpuRegister reg) {  in LockCmpxchgq()
786   void EmitGenericShift(bool wide, int rm, CpuRegister reg, const Immediate& imm);
787   void EmitGenericShift(bool wide, int rm, CpuRegister operand, CpuRegister shifter);
793   void EmitOptionalRex32(CpuRegister reg);
794   void EmitOptionalRex32(CpuRegister dst, CpuRegister src);
796   void EmitOptionalRex32(CpuRegister dst, XmmRegister src);
797   void EmitOptionalRex32(XmmRegister dst, CpuRegister src);
799   void EmitOptionalRex32(CpuRegister dst, const Operand& operand);
804   void EmitRex64(CpuRegister reg);
806   void EmitRex64(CpuRegister dst, CpuRegister src);
807   void EmitRex64(CpuRegister dst, const Operand& operand);
809   void EmitRex64(XmmRegister dst, CpuRegister src);
810   void EmitRex64(CpuRegister dst, XmmRegister src);
813   void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src);
814   void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand);