Lines Matching refs:op

273         uint32_t op = (instruction >> 21) & 0xf;  in DumpArm()  local
274 opcode = kDataProcessingOperations[op]; in DumpArm()
275 bool implicit_s = ((op & ~3) == 8); // TST, TEQ, CMP, and CMN. in DumpArm()
276 bool is_mov = op == 13U /* 0b1101 */ || op == 15U /* 0b1111 */; in DumpArm()
505 uint32_t op = (instr >> 23) & 3; in DumpThumb32() local
509 if (op == 1 || op == 2) { in DumpThumb32()
510 if (op == 1) { in DumpThumb32()
924 uint32_t op = (instr >> 7) & 1; in DumpThumb32() local
931 opcode << (op == 0 ? "vmov" : "vabs") << (S != 0 ? ".f64" : ".f32"); in DumpThumb32()
934 opcode << (op != 0 ? "vsqrt" : "vneg") << (S != 0 ? ".f64" : ".f32"); in DumpThumb32()
939 if (op != 0) { in DumpThumb32()
945 if (op != 0) { in DumpThumb32()
954 opcode << "vcvt" << (op == 0 ? "r" : "") << ".s32.f64"; in DumpThumb32()
958 opcode << "vcvt" << (op == 0 ? "r" : "") << ".s32.f32"; in DumpThumb32()
964 opcode << "vcvt" << (op == 0 ? "r" : "") << ".u32.f64"; in DumpThumb32()
968 opcode << "vcvt" << (op == 0 ? "r" : "") << ".u32.f32"; in DumpThumb32()
974 opcode << "vcvt.f64." << (op == 0 ? "u" : "s") << "32"; in DumpThumb32()
978 opcode << "vcvt.f32." << (op == 0 ? "u" : "s") << "32"; in DumpThumb32()
982 if (op == 1) { in DumpThumb32()
1008 uint32_t op = op3 & 1; in DumpThumb32() local
1012 if (op) { in DumpThumb32()
1774 uint16_t op = (instr >> 11) & 1; in DumpThumb16() local
1778 opcode << (op != 0 ? "cbnz" : "cbz"); in DumpThumb16()
1804 uint16_t op = (instr >> 6) & 3; in DumpThumb16() local
1805 opcode << kThumbReverseOperations[op]; in DumpThumb16()