Lines Matching refs:vregA
274 const uint32_t vregA = inst->VRegA_12x(); in CheckBinaryOp2addr() local
276 if (VerifyRegisterType(verifier, vregA, src_type1) && in CheckBinaryOp2addr()
280 if (GetRegisterType(verifier, vregA).IsBooleanTypes() && in CheckBinaryOp2addr()
282 SetRegisterType(verifier, vregA, verifier->GetRegTypeCache()->Boolean()); in CheckBinaryOp2addr()
286 SetRegisterType(verifier, vregA, dst_type); in CheckBinaryOp2addr()
294 const uint32_t vregA = inst->VRegA_12x(); in CheckBinaryOp2addrWide() local
296 if (VerifyRegisterTypeWide(verifier, vregA, src_type1_1, src_type1_2) && in CheckBinaryOp2addrWide()
298 SetRegisterTypeWide(verifier, vregA, dst_type1, dst_type2); in CheckBinaryOp2addrWide()
305 const uint32_t vregA = inst->VRegA_12x(); in CheckBinaryOp2addrWideShift() local
307 if (VerifyRegisterTypeWide(verifier, vregA, long_lo_type, long_hi_type) && in CheckBinaryOp2addrWideShift()
309 SetRegisterTypeWide(verifier, vregA, long_lo_type, long_hi_type); in CheckBinaryOp2addrWideShift()
316 const uint32_t vregA = is_lit16 ? inst->VRegA_22s() : inst->VRegA_22b(); in CheckLiteralOp() local
324 SetRegisterType(verifier, vregA, verifier->GetRegTypeCache()->Boolean()); in CheckLiteralOp()
328 SetRegisterType(verifier, vregA, dst_type); in CheckLiteralOp()