Lines Matching refs:v12
100 mov v12.s[0], w4 //d12[0] = ui_Bs
105 uxtl v12.8h, v12.8b //q6 = uc_Bs in each 16 bt scalar
118 tbl v14.8b, {v16.16b}, v12.8b //
122 uxtl v12.4s, v12.4h //
126 cmgt v12.4s, v12.4s, #0
142 bic v12.16b, v12.16b , v18.16b //final condition
152 and v20.16b, v20.16b , v12.16b //
153 and v22.16b, v22.16b , v12.16b //
162 … and v18.16b, v18.16b , v12.16b //Making delta zero in places where values shouldn be filterd
263 uabd v12.16b , v4.16b, v6.16b
266 cmhs v18.16b, v12.16b , v0.16b //ABS(p0 - q0) >= Alpha
279 cmhi v20.16b, v20.16b , v12.16b //(ABS(p0 - q0) <((Alpha >>2) + 2))
291 rshrn v12.8b, v16.8h, #3 //(2*(p0+q0+q1)+q2 +p1 +4)>> 3 L [q0']
293 mov v12.d[1] , v13.d[0]
308 bit v16.16b, v12.16b , v22.16b //choosing between q0' and q0" depending on condn
312 rshrn v12.8b, v28.8h, #2 //(p0+q0+q1+q2+2)>>2 L [q1']
314 mov v12.d[1] , v13.d[0]
329 bif v12.16b, v8.16b , v22.16b //choose q1 or filtered value of q1
330 mov v13.d[0] , v12.d[1]
336 st1 {v12.8b, v13.8b}, [x0], x1 //store q1
355 uaddw v12.8h, v24.8h , v30.8b //(p0+q0+p1) +p2 L
360 rshrn v26.8b, v12.8h, #2 //((p0+q0+p1)+p2 +2)>>2,p1' L
367 mla v12.8h, v8.8h , v1.h[0] //(p0+q0+p1)+3*p2+2*p3 L
373 rshrn v12.8b, v12.8h, #3 //((p0+q0+p1)+3*p2+2*p3+4)>>3 L p2'
375 mov v12.d[1] , v13.d[0]
378 bit v30.16b, v12.16b , v16.16b //choosing between p2 and p2'
451 ld1 {v12.8b}, [x0], x1 //row7
478 trn1 v21.8b, v12.8b, v14.8b
479 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
480 mov v12.8b, v21.8b
516 trn1 v21.4h, v8.4h, v12.4h
517 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
546 trn1 v31.2s, v4.2s, v12.2s
547 trn2 v12.2s, v4.2s, v12.2s //row3 & 7
557 mov v12.d[1] , v13.d[0]
581 uaddl v18.8h, v20.8b, v12.8b //q2 + ((p0 + q0 + 1) >> 1) L
593 uabd v20.16b , v12.16b, v8.16b //ABS(q1 - q0)
635 trn1 v21.8b, v12.8b, v14.8b
636 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
637 mov v12.8b, v21.8b
680 trn1 v21.4h, v8.4h, v12.4h
681 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
702 trn1 v21.2s, v4.2s, v12.2s
703 trn2 v12.2s, v4.2s, v12.2s //row3 & 7
714 st1 {v12.8b}, [x0], x1 //row7
781 ld1 {v12.8b}, [x0], x1 //row7
803 trn1 v21.8b, v12.8b, v14.8b
804 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
805 mov v12.8b, v21.8b
841 trn1 v21.4h, v8.4h, v12.4h
842 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
861 trn1 v21.2s, v4.2s, v12.2s
862 trn2 v12.2s, v4.2s, v12.2s //row3 & 7
895 mov v12.d[1] , v13.d[0]
923 uabd v30.16b , v12.16b, v8.16b
955 uaddl v14.8h, v4.8b, v12.8b //p1+q2 L
962 uaddw v18.8h, v18.8h , v12.8b //p0 + q0 + q1 + q2 L
983 uaddl v16.8h, v12.8b, v14.8b //q2+q3 L
1013 bit v12.16b, v18.16b , v30.16b //final q2
1014 mov v13.d[0] , v12.d[1]
1018 trn1 v31.8b, v12.8b, v14.8b
1019 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
1020 mov v12.8b, v31.8b
1031 trn1 v31.4h, v8.4h, v12.4h
1032 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
1056 trn1 v31.2s, v20.2s, v12.2s
1057 trn2 v12.2s, v20.2s, v12.2s //row3 & 7
1068 st1 {v12.8b}, [x0], x1 //row7