Lines Matching refs:OpIdx

996 int MachineInstr::findInlineAsmFlagIdx(unsigned OpIdx,  in findInlineAsmFlagIdx()  argument
999 assert(OpIdx < getNumOperands() && "OpIdx out of range"); in findInlineAsmFlagIdx()
1002 if (OpIdx < InlineAsm::MIOp_FirstOperand) in findInlineAsmFlagIdx()
1014 if (i + NumOps > OpIdx) { in findInlineAsmFlagIdx()
1025 MachineInstr::getRegClassConstraint(unsigned OpIdx, in getRegClassConstraint() argument
1034 return TII->getRegClass(getDesc(), OpIdx, TRI, MF); in getRegClassConstraint()
1036 if (!getOperand(OpIdx).isReg()) in getRegClassConstraint()
1041 if (getOperand(OpIdx).isUse() && isRegTiedToDefOperand(OpIdx, &DefIdx)) in getRegClassConstraint()
1042 OpIdx = DefIdx; in getRegClassConstraint()
1045 int FlagIdx = findInlineAsmFlagIdx(OpIdx); in getRegClassConstraint()
1080 unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl() argument
1084 const MachineOperand &MO = getOperand(OpIdx); in getRegClassConstraintEffectForVRegImpl()
1088 return getRegClassConstraintEffect(OpIdx, CurRC, TII, TRI); in getRegClassConstraintEffectForVRegImpl()
1092 unsigned OpIdx, const TargetRegisterClass *CurRC, in getRegClassConstraintEffect() argument
1094 const TargetRegisterClass *OpRC = getRegClassConstraint(OpIdx, TII, TRI); in getRegClassConstraintEffect()
1095 const MachineOperand &MO = getOperand(OpIdx); in getRegClassConstraintEffect()
1259 unsigned MachineInstr::findTiedOperandIdx(unsigned OpIdx) const { in findTiedOperandIdx()
1260 const MachineOperand &MO = getOperand(OpIdx); in findTiedOperandIdx()
1275 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
1294 if (OpIdx > i && OpIdx < i + NumOps) in findTiedOperandIdx()
1305 return OpIdx - Delta; in findTiedOperandIdx()
1309 return OpIdx + Delta; in findTiedOperandIdx()
1773 unsigned OpIdx = DeadOps.back(); in addRegisterKilled() local
1774 if (getOperand(OpIdx).isImplicit()) in addRegisterKilled()
1775 RemoveOperand(OpIdx); in addRegisterKilled()
1777 getOperand(OpIdx).setIsKill(false); in addRegisterKilled()
1837 unsigned OpIdx = DeadOps.back(); in addRegisterDead() local
1838 if (getOperand(OpIdx).isImplicit()) in addRegisterDead()
1839 RemoveOperand(OpIdx); in addRegisterDead()
1841 getOperand(OpIdx).setIsDead(false); in addRegisterDead()