150   MachineRegisterInfo *RegInfo = nullptr;  in ChangeToRegister()  local
154         RegInfo = &MF->getRegInfo();  in ChangeToRegister()
158   if (RegInfo && WasReg)  in ChangeToRegister()
159     RegInfo->removeRegOperandFromUseList(this);  in ChangeToRegister()
181   if (RegInfo)  in ChangeToRegister()
182     RegInfo->addRegOperandToUseList(this);  in ChangeToRegister()
1326                                       const TargetRegisterInfo &RegInfo) {  in substituteRegister()  argument
1329       ToReg = RegInfo.getSubReg(ToReg, SubIdx);  in substituteRegister()
1333       MO.substPhysReg(ToReg, RegInfo);  in substituteRegister()
1339       MO.substVirtReg(ToReg, SubIdx, RegInfo);  in substituteRegister()
1735                                      const TargetRegisterInfo *RegInfo,  in addRegisterKilled()  argument
1739     MCRegAliasIterator(IncomingReg, RegInfo, false).isValid();  in addRegisterKilled()
1764       if (RegInfo->isSuperRegister(IncomingReg, Reg))  in addRegisterKilled()
1766       if (RegInfo->isSubRegister(IncomingReg, Reg))  in addRegisterKilled()
1794                                       const TargetRegisterInfo *RegInfo) {  in clearRegisterKills()  argument
1796     RegInfo = nullptr;  in clearRegisterKills()
1801     if (OpReg == Reg || (RegInfo && RegInfo->isSuperRegister(Reg, OpReg)))  in clearRegisterKills()
1807                                    const TargetRegisterInfo *RegInfo,  in addRegisterDead()  argument
1811     MCRegAliasIterator(Reg, RegInfo, false).isValid();  in addRegisterDead()
1828       if (RegInfo->isSuperRegister(Reg, MOReg))  in addRegisterDead()
1830       if (RegInfo->isSubRegister(Reg, MOReg))  in addRegisterDead()
1875                                       const TargetRegisterInfo *RegInfo) {  in addRegisterDefined()  argument
1877     MachineOperand *MO = findRegisterDefOperand(Reg, false, RegInfo);  in addRegisterDefined()