Lines Matching refs:Rem
1644 Rem = rem; in init()
1755 unsigned OtherCritCount = Rem->RemIssueCount in getOtherResourceCount()
1761 unsigned OtherCount = getResourceCount(PIdx) + Rem->RemainingCounts[PIdx]; in getOtherResourceCount()
1876 assert(Rem->RemainingCounts[PIdx] >= Count && "resource double counted"); in countResource()
1877 Rem->RemainingCounts[PIdx] -= Count; in countResource()
1944 assert(Rem->RemIssueCount >= DecRemIssue && "MOps double counted"); in bumpNode()
1945 Rem->RemIssueCount -= DecRemIssue; in bumpNode()
2189 if (IsPostRA || (RemLatency + CurrZone.getCurrCycle() > Rem.CriticalPath)) { in setPolicy()
2194 << Rem.CriticalPath << "\n"); in setPolicy()
2371 Rem.init(DAG, SchedModel); in initialize()
2372 Top.init(DAG, SchedModel, &Rem); in initialize()
2373 Bot.init(DAG, SchedModel, &Rem); in initialize()
2450 if (Rem.CyclicCritPath == 0 || Rem.CyclicCritPath >= Rem.CriticalPath) in checkAcyclicLatency()
2455 std::max(Rem.CyclicCritPath * SchedModel->getLatencyFactor(), in checkAcyclicLatency()
2456 Rem.RemIssueCount); in checkAcyclicLatency()
2458 unsigned AcyclicCount = Rem.CriticalPath * SchedModel->getLatencyFactor(); in checkAcyclicLatency()
2461 (AcyclicCount * Rem.RemIssueCount + IterCount-1) / IterCount; in checkAcyclicLatency()
2465 Rem.IsAcyclicLatencyLimited = InFlightCount > BufferLimit; in checkAcyclicLatency()
2468 << Rem.RemIssueCount / SchedModel->getLatencyFactor() << "c " in checkAcyclicLatency()
2473 if (Rem.IsAcyclicLatencyLimited) in checkAcyclicLatency()
2478 Rem.CriticalPath = DAG->ExitSU.getDepth(); in registerRoots()
2483 if ((*I)->getDepth() > Rem.CriticalPath) in registerRoots()
2484 Rem.CriticalPath = (*I)->getDepth(); in registerRoots()
2486 DEBUG(dbgs() << "Critical Path(GS-RR ): " << Rem.CriticalPath << '\n'); in registerRoots()
2488 errs() << "Critical Path(GS-RR ): " << Rem.CriticalPath << " \n"; in registerRoots()
2492 Rem.CyclicCritPath = DAG->computeCyclicCriticalPath(); in registerRoots()
2630 if (Rem.IsAcyclicLatencyLimited && !Zone.getCurrMOps() in tryCandidate()
2675 if (Cand.Policy.ReduceLatency && !Rem.IsAcyclicLatencyLimited in tryCandidate()
2907 Rem.init(DAG, SchedModel); in initialize()
2908 Top.init(DAG, SchedModel, &Rem); in initialize()
2923 Rem.CriticalPath = DAG->ExitSU.getDepth(); in registerRoots()
2928 if ((*I)->getDepth() > Rem.CriticalPath) in registerRoots()
2929 Rem.CriticalPath = (*I)->getDepth(); in registerRoots()
2931 DEBUG(dbgs() << "Critical Path: (PGS-RR) " << Rem.CriticalPath << '\n'); in registerRoots()
2933 errs() << "Critical Path(PGS-RR ): " << Rem.CriticalPath << " \n"; in registerRoots()