201     void visitMachineOperand(const MachineOperand *MO, unsigned MONum);
210     void report(const char *msg, const MachineOperand *MO, unsigned MONum);
222     void checkLiveness(const MachineOperand *MO, unsigned MONum);
396                              const MachineOperand *MO, unsigned MONum) {  in report()  argument
399   errs() << "- operand " << MONum << ":   ";  in report()
812 MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {  in visitMachineOperand()  argument
817   if (MONum < MCID.getNumDefs()) {  in visitMachineOperand()
818     const MCOperandInfo &MCOI = MCID.OpInfo[MONum];  in visitMachineOperand()
820       report("Explicit definition must be a register", MO, MONum);  in visitMachineOperand()
822       report("Explicit definition marked as use", MO, MONum);  in visitMachineOperand()
824       report("Explicit definition marked as implicit", MO, MONum);  in visitMachineOperand()
825   } else if (MONum < MCID.getNumOperands()) {  in visitMachineOperand()
826     const MCOperandInfo &MCOI = MCID.OpInfo[MONum];  in visitMachineOperand()
830         !(MI->isVariadic() && MONum == MCID.getNumOperands()-1)) {  in visitMachineOperand()
832         report("Explicit operand marked as def", MO, MONum);  in visitMachineOperand()
834         report("Explicit operand marked as implicit", MO, MONum);  in visitMachineOperand()
837     int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);  in visitMachineOperand()
840         report("Tied use must be a register", MO, MONum);  in visitMachineOperand()
842         report("Operand should be tied", MO, MONum);  in visitMachineOperand()
843       else if (unsigned(TiedTo) != MI->findTiedOperandIdx(MONum))  in visitMachineOperand()
844         report("Tied def doesn't match MCInstrDesc", MO, MONum);  in visitMachineOperand()
846       report("Explicit operand should not be tied", MO, MONum);  in visitMachineOperand()
850       report("Extra explicit operand on non-variadic instruction", MO, MONum);  in visitMachineOperand()
859       checkLiveness(MO, MONum);  in visitMachineOperand()
863       unsigned OtherIdx = MI->findTiedOperandIdx(MONum);  in visitMachineOperand()
866         report("Must be tied to a register", MO, MONum);  in visitMachineOperand()
868         report("Missing tie flags on tied operand", MO, MONum);  in visitMachineOperand()
869       if (MI->findTiedOperandIdx(OtherIdx) != MONum)  in visitMachineOperand()
870         report("Inconsistent tie links", MO, MONum);  in visitMachineOperand()
871       if (MONum < MCID.getNumDefs()) {  in visitMachineOperand()
875                    MO, MONum);  in visitMachineOperand()
878             report("Explicit def should be tied to implicit use", MO, MONum);  in visitMachineOperand()
886         MI->isRegTiedToDefOperand(MONum, &DefIdx) &&  in visitMachineOperand()
888       report("Two-address instruction operands must be identical", MO, MONum);  in visitMachineOperand()
891     if (MONum < MCID.getNumOperands() && !MO->isImplicit()) {  in visitMachineOperand()
896           report("Illegal subregister index for physical register", MO, MONum);  in visitMachineOperand()
900               TII->getRegClass(MCID, MONum, TRI, *MF)) {  in visitMachineOperand()
902             report("Illegal physical register for instruction", MO, MONum);  in visitMachineOperand()
914             report("Invalid subregister index for virtual register", MO, MONum);  in visitMachineOperand()
920             report("Invalid register class for subregister index", MO, MONum);  in visitMachineOperand()
927               TII->getRegClass(MCID, MONum, TRI, *MF)) {  in visitMachineOperand()
932               report("No largest legal super class exists.", MO, MONum);  in visitMachineOperand()
937               report("No matching super-reg register class.", MO, MONum);  in visitMachineOperand()
942             report("Illegal virtual register for instruction", MO, MONum);  in visitMachineOperand()
959       report("PHI operand is not in the CFG", MO, MONum);  in visitMachineOperand()
968         report("Instruction loads from dead spill slot", MO, MONum);  in visitMachineOperand()
972         report("Instruction stores to dead spill slot", MO, MONum);  in visitMachineOperand()
983 void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {  in checkLiveness()  argument
999         report("Kill missing from LiveVariables", MO, MONum);  in checkLiveness()
1011               report("No live segment at use", MO, MONum);  in checkLiveness()
1016               report("Live range continues after kill flag", MO, MONum);  in checkLiveness()
1029             report("No live segment at use", MO, MONum);  in checkLiveness()
1035             report("Live range continues after kill flag", MO, MONum);  in checkLiveness()
1039           report("Virtual register has no live interval", MO, MONum);  in checkLiveness()
1079           report("Using an undefined physical register", MO, MONum);  in checkLiveness()
1081         report("Reading virtual register without a def", MO, MONum);  in checkLiveness()
1088           report("Using a killed virtual register", MO, MONum);  in checkLiveness()
1106       report("Multiple virtual register defs in SSA form", MO, MONum);  in checkLiveness()
1118             report("Inconsistent valno->def", MO, MONum);  in checkLiveness()
1123           report("No live segment at def", MO, MONum);  in checkLiveness()
1130             report("Live range continues after dead def flag", MO, MONum);  in checkLiveness()
1135         report("Virtual register has no Live interval", MO, MONum);  in checkLiveness()