245 void RAFast::killVirtReg(LiveRegMap::iterator LRI) {  in killVirtReg()  argument
246   addKillFlag(*LRI);  in killVirtReg()
247   assert(PhysRegState[LRI->PhysReg] == LRI->VirtReg &&  in killVirtReg()
249   PhysRegState[LRI->PhysReg] = regFree;  in killVirtReg()
252     LiveVirtRegs.erase(LRI);  in killVirtReg()
259   LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in killVirtReg()  local
260   if (LRI != LiveVirtRegs.end())  in killVirtReg()
261     killVirtReg(LRI);  in killVirtReg()
269   LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in spillVirtReg()  local
270   assert(LRI != LiveVirtRegs.end() && "Spilling unmapped virtual register");  in spillVirtReg()
271   spillVirtReg(MI, LRI);  in spillVirtReg()
276                           LiveRegMap::iterator LRI) {  in spillVirtReg()  argument
277   LiveReg &LR = *LRI;  in spillVirtReg()
278   assert(PhysRegState[LR.PhysReg] == LRI->VirtReg && "Broken RegState mapping");  in spillVirtReg()
285     DEBUG(dbgs() << "Spilling " << PrintReg(LRI->VirtReg, TRI)  in spillVirtReg()
287     const TargetRegisterClass *RC = MRI->getRegClass(LRI->VirtReg);  in spillVirtReg()
288     int FI = getStackSpaceFor(LRI->VirtReg, RC);  in spillVirtReg()
297       LiveDbgValueMap[LRI->VirtReg];  in spillVirtReg()
324   killVirtReg(LRI);  in spillVirtReg()
508   LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in assignVirtToPhysReg()  local
509   assert(LRI != LiveVirtRegs.end() && "VirtReg disappeared");  in assignVirtToPhysReg()
510   assignVirtToPhysReg(*LRI, PhysReg);  in assignVirtToPhysReg()
511   return LRI;  in assignVirtToPhysReg()
516                                                   LiveRegMap::iterator LRI,  in allocVirtReg()  argument
518   const unsigned VirtReg = LRI->VirtReg;  in allocVirtReg()
549       assignVirtToPhysReg(*LRI, PhysReg);  in allocVirtReg()
550       return LRI;  in allocVirtReg()
565       assignVirtToPhysReg(*LRI, *I);  in allocVirtReg()
566       return LRI;  in allocVirtReg()
594   LiveRegMap::iterator LRI;  in defineVirtReg()  local
596   std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));  in defineVirtReg()
606     LRI = allocVirtReg(MI, LRI, Hint);  in defineVirtReg()
607   } else if (LRI->LastUse) {  in defineVirtReg()
610     if (LRI->LastUse != MI || LRI->LastUse->getOperand(LRI->LastOpNum).isUse())  in defineVirtReg()
611       addKillFlag(*LRI);  in defineVirtReg()
613   assert(LRI->PhysReg && "Register not assigned");  in defineVirtReg()
614   LRI->LastUse = MI;  in defineVirtReg()
615   LRI->LastOpNum = OpNum;  in defineVirtReg()
616   LRI->Dirty = true;  in defineVirtReg()
617   markRegUsedInInstr(LRI->PhysReg);  in defineVirtReg()
618   return LRI;  in defineVirtReg()
627   LiveRegMap::iterator LRI;  in reloadVirtReg()  local
629   std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));  in reloadVirtReg()
632     LRI = allocVirtReg(MI, LRI, Hint);  in reloadVirtReg()
636                  << PrintReg(LRI->PhysReg, TRI) << "\n");  in reloadVirtReg()
637     TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);  in reloadVirtReg()
639   } else if (LRI->Dirty) {  in reloadVirtReg()
664   assert(LRI->PhysReg && "Register not assigned");  in reloadVirtReg()
665   LRI->LastUse = MI;  in reloadVirtReg()
666   LRI->LastOpNum = OpNum;  in reloadVirtReg()
667   markRegUsedInInstr(LRI->PhysReg);  in reloadVirtReg()
668   return LRI;  in reloadVirtReg()
747       LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, 0);  in handleThroughOperands()  local
748       unsigned PhysReg = LRI->PhysReg;  in handleThroughOperands()
756       LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, 0);  in handleThroughOperands()  local
757       PartialDefs.push_back(LRI->PhysReg);  in handleThroughOperands()
770     LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0);  in handleThroughOperands()  local
771     unsigned PhysReg = LRI->PhysReg;  in handleThroughOperands()
858           LiveRegMap::iterator LRI = findLiveVirtReg(Reg);  in AllocateBasicBlock()  local
859           if (LRI != LiveVirtRegs.end())  in AllocateBasicBlock()
860             setPhysReg(MI, i, LRI->PhysReg);  in AllocateBasicBlock()
981         LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, CopyDst);  in AllocateBasicBlock()  local
982         unsigned PhysReg = LRI->PhysReg;  in AllocateBasicBlock()
985           killVirtReg(LRI);  in AllocateBasicBlock()
1036       LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, CopySrc);  in AllocateBasicBlock()  local
1037       unsigned PhysReg = LRI->PhysReg;  in AllocateBasicBlock()