Lines Matching refs:getInstr

253   const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx);  in addPhysRegDataDeps()
280 RegUse = UseSU->getInstr(); in addPhysRegDataDeps()
283 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse, in addPhysRegDataDeps()
296 MachineInstr *MI = SU->getInstr(); in addPhysRegDeps()
316 !DefSU->getInstr()->registerDefIsDead(*Alias))) { in addPhysRegDeps()
322 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps()
377 const MachineInstr *MI = SU->getInstr(); in addVRegDefDeps()
401 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
415 MachineInstr *MI = SU->getInstr(); in addVRegUseDeps()
606 isGlobalMemoryObject(AA, SUb->getInstr())) in iterateChainSucc()
613 MIsNeedChainEdge(AA, MFI, DL, SUa->getInstr(), SUb->getInstr())) { in iterateChainSucc()
645 if (MIsNeedChainEdge(AA, MFI, DL, SU->getInstr(), (*I)->getInstr())) { in adjustChainDeps()
647 Dep.setLatency(((*I)->getInstr()->mayLoad()) ? LatencyToLoad : 0); in adjustChainDeps()
671 if (MIsNeedChainEdge(AA, MFI, DL, SUa->getInstr(), SUb->getInstr())) { in addChainDependency()
713 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
901 if (AliasChain->getInstr()->mayLoad()) in buildSchedGraph()
1213 SU->getInstr()->dump(); in dumpNode()
1225 SU->getInstr()->print(oss, /*SkipOpers=*/true); in getGraphNodeLabel()
1281 SU->getInstr()->isTransient() ? 0 : 1; in visitPreorder()
1292 RData.SubInstrCount = SU->getInstr()->isTransient() ? 0 : 1; in visitPostorderNode()