Lines Matching refs:createResultReg
254 Reg = createResultReg(TLI.getRegClassFor(VT)); in materializeConstant()
743 CLI.ResultReg = createResultReg(TLI.getRegClassFor(MVT::i64)); in selectPatchpoint()
1291 ResultReg = createResultReg(DstClass); in selectBitCast()
1689 unsigned FastISel::createResultReg(const TargetRegisterClass *RC) { in createResultReg() function in FastISel
1701 unsigned NewOp = createResultReg(RegClass); in constrainOperandRegClass()
1712 unsigned ResultReg = createResultReg(RC); in fastEmitInst_()
1724 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r()
1746 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()
1771 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rrr()
1797 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri()
1820 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rii()
1844 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rf()
1867 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rri()
1894 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rrii()
1918 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i()
1935 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ii()
1953 unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg()