Lines Matching refs:SRL
391 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in ExpandUnalignedStore()
796 Hi = DAG.getNode(ISD::SRL, dl, Value.getValueType(), Value, in LegalizeStoreOps()
807 Hi = DAG.getNode(ISD::SRL, dl, Value.getValueType(), Value, in LegalizeStoreOps()
1305 case ISD::SRL: in LegalizeOp()
2489 SDValue Hi = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, in ExpandLegalINT_TO_FP()
2510 SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst); in ExpandLegalINT_TO_FP()
2544 SDValue Sh = DAG.getNode(ISD::SRL, dl, MVT::i64, Sel2, in ExpandLegalINT_TO_FP()
2699 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT)); in ExpandBSWAP()
2704 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT)); in ExpandBSWAP()
2705 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(24, SHVT)); in ExpandBSWAP()
2716 Tmp4 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT)); in ExpandBSWAP()
2717 Tmp3 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(24, SHVT)); in ExpandBSWAP()
2718 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(40, SHVT)); in ExpandBSWAP()
2719 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(56, SHVT)); in ExpandBSWAP()
2760 DAG.getNode(ISD::SRL, dl, VT, Op, in ExpandBitCount()
2767 DAG.getNode(ISD::SRL, dl, VT, Op, in ExpandBitCount()
2773 DAG.getNode(ISD::SRL, dl, VT, Op, in ExpandBitCount()
2777 Op = DAG.getNode(ISD::SRL, dl, VT, in ExpandBitCount()
2802 DAG.getNode(ISD::SRL, dl, VT, Op, Tmp3)); in ExpandBitCount()
3228 Tmp1 = DAG.getNode(ISD::SRL, dl, OpTy, Node->getOperand(0), in ExpandNode()
3984 case ISD::SRL: in ExpandNode()
4072 Tmp1 = DAG.getNode(ISD::SRL, dl, NVT, Tmp1, in PromoteNode()