1215                                SmallVectorImpl<unsigned> &LRegs,  in CheckForLiveRegDef()  argument
1227       LRegs.push_back(*AliasI);  in CheckForLiveRegDef()
1237                                      SmallVectorImpl<unsigned> &LRegs) {  in CheckForLiveRegDefMasked()  argument
1244       LRegs.push_back(i);  in CheckForLiveRegDefMasked()
1262 DelayForLiveRegsBottomUp(SUnit *SU, SmallVectorImpl<unsigned> &LRegs) {  in DelayForLiveRegsBottomUp()  argument
1275                          RegAdded, LRegs, TRI);  in DelayForLiveRegsBottomUp()
1298               CheckForLiveRegDef(SU, Reg, LiveRegDefs, RegAdded, LRegs, TRI);  in DelayForLiveRegsBottomUp()
1320           LRegs.push_back(CallResource);  in DelayForLiveRegsBottomUp()
1324       CheckForLiveRegDefMasked(SU, RegMask, LiveRegDefs, RegAdded, LRegs);  in DelayForLiveRegsBottomUp()
1330       CheckForLiveRegDef(SU, *Reg, LiveRegDefs, RegAdded, LRegs, TRI);  in DelayForLiveRegsBottomUp()
1333   return !LRegs.empty();  in DelayForLiveRegsBottomUp()
1342       SmallVectorImpl<unsigned> &LRegs = LRegsPos->second;  in releaseInterferences()  local
1343       if (std::find(LRegs.begin(), LRegs.end(), Reg) == LRegs.end())  in releaseInterferences()
1368     SmallVector<unsigned, 4> LRegs;  in PickNodeToScheduleBottomUp()  local
1369     if (!DelayForLiveRegsBottomUp(CurSU, LRegs))  in PickNodeToScheduleBottomUp()
1372           (LRegs[0] == TRI->getNumRegs() ? "CallResource"  in PickNodeToScheduleBottomUp()
1373            : TRI->getName(LRegs[0]))  in PickNodeToScheduleBottomUp()
1376       LRegsMap.insert(std::make_pair(CurSU, LRegs));  in PickNodeToScheduleBottomUp()
1384       LRegsPair.first->second = LRegs;  in PickNodeToScheduleBottomUp()
1396     SmallVectorImpl<unsigned> &LRegs = LRegsMap[TrySU];  in PickNodeToScheduleBottomUp()  local
1402     for (unsigned j = 0, ee = LRegs.size(); j != ee; ++j) {  in PickNodeToScheduleBottomUp()
1403       unsigned Reg = LRegs[j];  in PickNodeToScheduleBottomUp()
1445     SmallVectorImpl<unsigned> &LRegs = LRegsMap[TrySU];  in PickNodeToScheduleBottomUp()  local
1446     assert(LRegs.size() == 1 && "Can't handle this yet!");  in PickNodeToScheduleBottomUp()
1447     unsigned Reg = LRegs[0];  in PickNodeToScheduleBottomUp()