Lines Matching refs:NumRegs
255 unsigned NumRegs = in getCopyFromPartsVector() local
258 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); in getCopyFromPartsVector()
259 NumParts = NumRegs; // Silence a compiler warning. in getCopyFromPartsVector()
539 unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, in getCopyToPartsVector() local
544 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); in getCopyToPartsVector()
545 NumParts = NumRegs; // Silence a compiler warning. in getCopyToPartsVector()
625 unsigned NumRegs = tli.getNumRegisters(Context, ValueVT); in RegsForValue() local
627 for (unsigned i = 0; i != NumRegs; ++i) in RegsForValue()
630 Reg += NumRegs; in RegsForValue()
690 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVT); in getCopyFromRegs() local
693 Parts.resize(NumRegs); in getCopyFromRegs()
694 for (unsigned i = 0; i != NumRegs; ++i) { in getCopyFromRegs()
759 NumRegs, RegisterVT, ValueVT, V); in getCopyFromRegs()
760 Part += NumRegs; in getCopyFromRegs()
778 unsigned NumRegs = Regs.size(); in getCopyToRegs() local
779 SmallVector<SDValue, 8> Parts(NumRegs); in getCopyToRegs()
794 SmallVector<SDValue, 8> Chains(NumRegs); in getCopyToRegs()
795 for (unsigned i = 0; i != NumRegs; ++i) { in getCopyToRegs()
807 if (NumRegs == 1 || Flag) in getCopyToRegs()
818 Chain = Chains[NumRegs-1]; in getCopyToRegs()
852 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value]); in AddInlineAsmOperands() local
854 for (unsigned i = 0; i != NumRegs; ++i) { in AddInlineAsmOperands()
6203 unsigned NumRegs = 1; in GetRegistersForValue() local
6230 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT); in GetRegistersForValue()
6252 if (NumRegs != 1) { in GetRegistersForValue()
6258 --NumRegs; ++I; in GetRegistersForValue()
6259 for (; NumRegs; --NumRegs, ++I) { in GetRegistersForValue()
6278 for (; NumRegs; --NumRegs) in GetRegistersForValue()
7203 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), VT); in LowerCallTo() local
7204 for (unsigned i = 0; i != NumRegs; ++i) { in LowerCallTo()
7397 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), VT); in LowerCallTo() local
7400 NumRegs, RegisterVT, VT, nullptr, in LowerCallTo()
7402 CurReg += NumRegs; in LowerCallTo()
7548 unsigned NumRegs = TLI->getNumRegisters(*CurDAG->getContext(), VT); in LowerArguments() local
7549 for (unsigned i = 0; i != NumRegs; ++i) { in LowerArguments()
7552 if (NumRegs > 1 && i == 0) in LowerArguments()