1915   B.RegVT = VT.getSimpleVT();  in visitBitTestHeader()
1916   B.Reg = FuncInfo.CreateReg(B.RegVT);  in visitBitTestHeader()
1944   MVT VT = BB.RegVT;  in visitBitTestCase()
6213       MVT RegVT = *PhysReg.second->vt_begin();  in GetRegistersForValue()  local
6214       if (RegVT.getSizeInBits() == OpInfo.CallOperand.getValueSizeInBits()) {  in GetRegistersForValue()
6216                                          RegVT, OpInfo.CallOperand);  in GetRegistersForValue()
6217         OpInfo.ConstraintVT = RegVT;  in GetRegistersForValue()
6218       } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {  in GetRegistersForValue()
6223         RegVT = MVT::getIntegerVT(OpInfo.ConstraintVT.getSizeInBits());  in GetRegistersForValue()
6225                                          RegVT, OpInfo.CallOperand);  in GetRegistersForValue()
6226         OpInfo.ConstraintVT = RegVT;  in GetRegistersForValue()
6233   MVT RegVT;  in GetRegistersForValue()  local
6246     RegVT = *RC->vt_begin();  in GetRegistersForValue()
6265     OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);  in GetRegistersForValue()
6272     RegVT = *RC->vt_begin();  in GetRegistersForValue()
6274       ValueVT = RegVT;  in GetRegistersForValue()
6281     OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);  in GetRegistersForValue()
6626           MVT RegVT = AsmNodeOperands[CurOp+1].getSimpleValueType();  in visitInlineAsm()  local
6627           MatchedRegs.RegVTs.push_back(RegVT);  in visitInlineAsm()
6631             if (const TargetRegisterClass *RC = TLI.getRegClassFor(RegVT))  in visitInlineAsm()
7596     MVT RegVT = TLI->getRegisterType(*CurDAG->getContext(), VT);  in LowerArguments()  local
7599                                         RegVT, VT, nullptr, AssertOp);  in LowerArguments()
7603     unsigned SRetReg = RegInfo.createVirtualRegister(TLI->getRegClassFor(RegVT));  in LowerArguments()