Lines Matching refs:VirtRegMap
52 char VirtRegMap::ID = 0;
54 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
56 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
70 void VirtRegMap::grow() { in grow()
77 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
84 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { in hasPreferredPhys()
93 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { in hasKnownPreference()
102 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
110 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
120 void VirtRegMap::print(raw_ostream &OS, const Module*) const { in print()
124 if (Virt2PhysMap[Reg] != (unsigned)VirtRegMap::NO_PHYS_REG) { in print()
133 if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) { in print()
142 void VirtRegMap::dump() const { in dump()
165 VirtRegMap *VRM;
188 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
202 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
214 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
253 assert(PhysReg != VirtRegMap::NO_PHYS_REG && "Unmapped virtual register."); in addMBBLiveIns()
362 assert(PhysReg != VirtRegMap::NO_PHYS_REG && in rewrite()