162   SmallVector<MachineOperand, 4> HeadCond;  member in __anon2dd089570111::SSACCmpConv
497   HeadCond.clear();  in canConvert()
499   if (TII->AnalyzeBranch(*Head, TBB, FBB, HeadCond)) {  in canConvert()
507   if (!TBB || HeadCond.empty()) {  in canConvert()
513   if (!parseCond(HeadCond, HeadCmpBBCC)) {  in canConvert()
578   if (HeadCond[0].getImm() == -1) {  in convert()
581     switch (HeadCond[1].getImm()) {  in convert()
600         .addOperand(HeadCond[2])  in convert()
604     MRI->constrainRegClass(HeadCond[2].getReg(),  in convert()
688   if (HeadCond[0].getImm() == -1) {  in expectedCodeSizeDelta()
689     switch (HeadCond[1].getImm()) {  in expectedCodeSizeDelta()