Lines Matching refs:v8i16
1227 defm : ScalToVecROLoadPat<ro16, extloadi16, i32, v8i16, LDRHroW, LDRHroX, hsub>;
1285 defm : VecROLoadPat<ro128, v8i16, LDRQroW, LDRQroX>;
1385 def : Pat <(v8i16 (scalar_to_vector (i32
1387 (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)),
1433 def : Pat<(v8i16 (load (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
1595 def : Pat<(v8i16 (load (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
1910 defm : VecROStorePat<ro128, v8i16, FPR128, STRQroW, STRQroX>;
1934 defm : VecROStoreLane0Pat<ro16, truncstorei16, v8i16, i32, hsub, STRHroW, STRHroX>;
1935 defm : VecROStoreLane0Pat<ro16, store , v8i16, i16, hsub, STRHroW, STRHroX>;
2013 def : Pat<(store (v8i16 FPR128:$Rt),
2108 def : Pat<(store (v8i16 FPR128:$Rt),
2204 def : Pat<(pre_store (v8i16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
2258 def : Pat<(post_store (v8i16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
2535 def : Pat<(xor (v8i16 (AArch64vashr V128:$src, (i32 15))),
2536 (v8i16 (add V128:$src, (AArch64vashr V128:$src, (i32 15))))),
2565 def : Pat<(v4f32 (int_aarch64_neon_vcvthf2fp (extract_subvector (v8i16 V128:$Rn),
2627 def : Pat<(AArch64neg (v8i16 V128:$Rn)), (NEGv8i16 V128:$Rn)>;
2635 def : Pat<(AArch64not (v8i16 V128:$Rn)), (NOTv16i8 V128:$Rn)>;
2642 def : Pat<(vnot (v8i16 V128:$Rn)), (NOTv16i8 V128:$Rn)>;
2683 def : Pat<(AArch64vshl (v8i16 (ext (v8i8 V64:$Rn))), (i32 8)),
2685 def : Pat<(AArch64vshl (v8i16 (ext (extract_high_v16i8 V128:$Rn))), (i32 8)),
2823 def : Pat<(AArch64bsl (v8i16 V128:$Rd), V128:$Rn, V128:$Rm),
3293 def : Pat<(v8i16 (opnode (v8i8 V64:$Rn), (v8i8 V64:$Rm))),
3309 def : Pat<(v8i16 (opnode (v8i16 V128:$Rd), (v8i8 V64:$Rn), (v8i8 V64:$Rm))),
3341 def : Pat<(v8i8 (trunc (v8i16 (AArch64vlshr (add V128:$Rn, V128:$Rm), (i32 8))))),
3350 (trunc (v8i16 (AArch64vlshr (add V128:$Rn, V128:$Rm),
3366 def : Pat<(v8i8 (trunc (v8i16 (AArch64vlshr (sub V128:$Rn, V128:$Rm), (i32 8))))),
3375 (trunc (v8i16 (AArch64vlshr (sub V128:$Rn, V128:$Rm),
3398 def : Pat<(v8i16 (AArch64ext V128:$Rn, V128:$Rm, (i32 imm:$imm))),
3516 def DUPv8i16gpr : SIMDDupFromMain<1, {?,?,?,1,0}, ".8h", v8i16, V128, GPR32>;
3525 def DUPv8i16lane : SIMDDup16FromElement<1, ".8h", v8i16, V128>;
3543 (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)), FPR16:$Rn, hsub),
3547 (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)), FPR16:$Rn, hsub),
3587 defm : DUPWithTruncPats<v8i8, v4i16, v8i16, i32, DUPv8i8lane, VecIndex_x2>;
3591 defm : DUPWithTruncPats<v16i8, v4i16, v8i16, i32, DUPv16i8lane, VecIndex_x2>;
3593 defm : DUPWithTruncPats<v8i16, v2i32, v4i32, i32, DUPv8i16lane, VecIndex_x2>;
3611 defm : DUPWithTrunci64Pats<v8i16, DUPv8i16lane, VecIndex_x4>;
3622 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
3624 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
3626 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
3638 def : Pat<(and (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),
3651 def : Pat<(v8i16 (scalar_to_vector GPR32:$Rn)),
3724 def : Pat<(v8i16 (int_aarch64_neon_vcopy_lane
3725 (v8i16 V128:$Vd), VectorIndexH:$idx, (v8i16 V128:$Vs),
3727 (v8i16 (INSvi16lane
3806 def : ConcatPat<v8i16, v4i16>;
3819 def : ConcatUndefPat<v8i16, v4i16>;
3854 def : Pat<(v8i16 (opNode V128:$Rn)),
3855 (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)),
3877 def : Pat<(i32 (vector_extract (v8i16 (opNode V128:$Rn)), (i64 0))),
3878 (EXTRACT_SUBREG (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)),
3912 (opNode (v8i16 V128:$Rn)), (i64 0))), i16)),
3942 def : Pat<(i32 (and (i32 (vector_extract (opNode (v8i16 V128:$Rn)), (i64 0))),
3993 def : Pat<(i32 (intOp (v8i16 V128:$Rn))),
4024 def : Pat<(i32 (intOp (v8i16 V128:$Rn))),
4138 def : Pat<(v8i16 immAllZerosV), (MOVIv2d_ns (i32 0))>;
4143 def : Pat<(v8i16 immAllOnesV), (MOVIv2d_ns (i32 255))>;
4168 def : Pat<(v8i16 (AArch64movi_shift imm0_255:$imm8, (i32 imm:$shift))),
4208 def : Pat<(v8i16 (AArch64mvni_shift imm0_255:$imm8, (i32 imm:$shift))),
4512 def : Pat<(v8i8 (trunc (AArch64vlshr (v8i16 V128:$Rn), vecshiftR16Narrow:$imm))),
4520 (trunc (AArch64vlshr (v8i16 V128:$Rn),
4524 def : Pat<(v8i16 (concat_vectors (v4i16 V64:$Rd),
4537 def : Pat<(v8i16 (sext (v8i8 V64:$Rn))), (SSHLLv8i8_shift V64:$Rn, (i32 0))>;
4538 def : Pat<(v8i16 (zext (v8i8 V64:$Rn))), (USHLLv8i8_shift V64:$Rn, (i32 0))>;
4539 def : Pat<(v8i16 (anyext (v8i8 V64:$Rn))), (USHLLv8i8_shift V64:$Rn, (i32 0))>;
4547 def : Pat<(v8i16 (anyext (v8i8 (extract_subvector V128:$Rn, (i64 8)) ))),
4549 def : Pat<(v8i16 (zext (v8i8 (extract_subvector V128:$Rn, (i64 8)) ))),
4551 def : Pat<(v8i16 (sext (v8i8 (extract_subvector V128:$Rn, (i64 8)) ))),
4752 def : Ld1Pat<v8i16, LD1Onev8h>;
4765 def : St1Pat<v8i16, ST1Onev8h>;
4806 def : Pat<(v8i16 (AArch64dup (i32 (extloadi16 GPR64sp:$Rn)))),
4837 def : Ld1Lane128Pat<extloadi16, VectorIndexH, v8i16, i32, LD1i16>;
4880 def : St1Lane128Pat<truncstorei16, VectorIndexH, v8i16, i32, ST1i16>;
4943 defm : St1LanePost128Pat<post_truncsti16, VectorIndexH, v8i16, i32, ST1i16_POST,
5164 def : Pat<(v8i16 (AArch64NvCast (v4i32 FPR128:$src))), (v8i16 FPR128:$src)>;
5170 def : Pat<(v16i8 (AArch64NvCast (v8i16 FPR128:$src))), (v16i8 FPR128:$src)>;
5171 def : Pat<(v8i16 (AArch64NvCast (v8i16 FPR128:$src))), (v8i16 FPR128:$src)>;
5172 def : Pat<(v8f16 (AArch64NvCast (v8i16 FPR128:$src))), (v8f16 FPR128:$src)>;
5173 def : Pat<(v4i32 (AArch64NvCast (v8i16 FPR128:$src))), (v4i32 FPR128:$src)>;
5174 def : Pat<(v2i64 (AArch64NvCast (v8i16 FPR128:$src))), (v2i64 FPR128:$src)>;
5177 def : Pat<(v8i16 (AArch64NvCast (v16i8 FPR128:$src))), (v8i16 FPR128:$src)>;
5183 def : Pat<(v8i16 (AArch64NvCast (v2i64 FPR128:$src))), (v8i16 FPR128:$src)>;
5191 def : Pat<(v8i16 (AArch64NvCast (v4f32 FPR128:$src))), (v8i16 FPR128:$src)>;
5197 def : Pat<(v8i16 (AArch64NvCast (v2f64 FPR128:$src))), (v8i16 FPR128:$src)>;
5463 def : Pat<(f128 (bitconvert (v8i16 FPR128:$src))), (f128 FPR128:$src)>;
5475 def : Pat<(f128 (bitconvert (v8i16 FPR128:$src))),
5494 def : Pat<(v2f64 (bitconvert (v8i16 FPR128:$src))), (v2f64 FPR128:$src)>;
5505 def : Pat<(v2f64 (bitconvert (v8i16 FPR128:$src))),
5518 def : Pat<(v4f32 (bitconvert (v8i16 FPR128:$src))), (v4f32 FPR128:$src)>;
5528 def : Pat<(v4f32 (bitconvert (v8i16 FPR128:$src))),
5544 def : Pat<(v2i64 (bitconvert (v8i16 FPR128:$src))), (v2i64 FPR128:$src)>;
5555 def : Pat<(v2i64 (bitconvert (v8i16 FPR128:$src))),
5569 def : Pat<(v4i32 (bitconvert (v8i16 FPR128:$src))), (v4i32 FPR128:$src)>;
5581 def : Pat<(v4i32 (bitconvert (v8i16 FPR128:$src))),
5593 def : Pat<(v8i16 (bitconvert (f128 FPR128:$src))), (v8i16 FPR128:$src)>;
5594 def : Pat<(v8i16 (bitconvert (v2i64 FPR128:$src))), (v8i16 FPR128:$src)>;
5595 def : Pat<(v8i16 (bitconvert (v4i32 FPR128:$src))), (v8i16 FPR128:$src)>;
5596 def : Pat<(v8i16 (bitconvert (v16i8 FPR128:$src))), (v8i16 FPR128:$src)>;
5597 def : Pat<(v8i16 (bitconvert (v2f64 FPR128:$src))), (v8i16 FPR128:$src)>;
5598 def : Pat<(v8i16 (bitconvert (v4f32 FPR128:$src))), (v8i16 FPR128:$src)>;
5599 def : Pat<(v8i16 (bitconvert (v8f16 FPR128:$src))), (v8i16 FPR128:$src)>;
5602 def : Pat<(v8i16 (bitconvert (f128 FPR128:$src))),
5603 (v8i16 (EXTv16i8 (REV64v8i16 FPR128:$src),
5606 def : Pat<(v8i16 (bitconvert (v2i64 FPR128:$src))),
5607 (v8i16 (REV64v8i16 FPR128:$src))>;
5608 def : Pat<(v8i16 (bitconvert (v4i32 FPR128:$src))),
5609 (v8i16 (REV32v8i16 FPR128:$src))>;
5610 def : Pat<(v8i16 (bitconvert (v16i8 FPR128:$src))),
5611 (v8i16 (REV16v16i8 FPR128:$src))>;
5612 def : Pat<(v8i16 (bitconvert (v2f64 FPR128:$src))),
5613 (v8i16 (REV64v8i16 FPR128:$src))>;
5614 def : Pat<(v8i16 (bitconvert (v4f32 FPR128:$src))),
5615 (v8i16 (REV32v8i16 FPR128:$src))>;
5616 def : Pat<(v8i16 (bitconvert (v8f16 FPR128:$src))),
5617 (v8i16 (REV32v8i16 FPR128:$src))>;
5624 def : Pat<(v8f16 (bitconvert (v8i16 FPR128:$src))), (v8f16 FPR128:$src)>;
5638 def : Pat<(v8f16 (bitconvert (v8i16 FPR128:$src))),
5652 def : Pat<(v16i8 (bitconvert (v8i16 FPR128:$src))), (v16i8 FPR128:$src)>;
5666 def : Pat<(v16i8 (bitconvert (v8i16 FPR128:$src))),
5678 def : Pat<(v4i16 (extract_subvector (v8i16 FPR128:$Rn), (i64 1))),
5696 (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)), FPR64:$src, dsub)>;