Lines Matching refs:Operands
57 bool parseSysAlias(StringRef Name, SMLoc NameLoc, OperandVector &Operands);
59 bool parseCondCode(OperandVector &Operands, bool invertCondCode);
63 bool parseRegister(OperandVector &Operands);
65 bool parseVectorList(OperandVector &Operands);
66 bool parseOperand(OperandVector &Operands, bool isCondCode,
86 OperandVector &Operands, MCStreamer &Out,
97 OperandMatchResultTy tryParseOptionalShiftExtend(OperandVector &Operands);
98 OperandMatchResultTy tryParseBarrierOperand(OperandVector &Operands);
99 OperandMatchResultTy tryParseMRSSystemRegister(OperandVector &Operands);
100 OperandMatchResultTy tryParseSysReg(OperandVector &Operands);
101 OperandMatchResultTy tryParseSysCROperand(OperandVector &Operands);
102 OperandMatchResultTy tryParsePrefetch(OperandVector &Operands);
103 OperandMatchResultTy tryParseAdrpLabel(OperandVector &Operands);
104 OperandMatchResultTy tryParseAdrLabel(OperandVector &Operands);
105 OperandMatchResultTy tryParseFPImm(OperandVector &Operands);
106 OperandMatchResultTy tryParseAddSubImm(OperandVector &Operands);
107 OperandMatchResultTy tryParseGPR64sp0Operand(OperandVector &Operands);
108 bool tryParseVectorRegister(OperandVector &Operands);
129 SMLoc NameLoc, OperandVector &Operands) override;
1919 AArch64AsmParser::tryParseSysCROperand(OperandVector &Operands) { in tryParseSysCROperand() argument
1942 Operands.push_back( in tryParseSysCROperand()
1949 AArch64AsmParser::tryParsePrefetch(OperandVector &Operands) { in tryParsePrefetch() argument
1977 Operands.push_back(AArch64Operand::CreatePrefetch(prfop, Name, in tryParsePrefetch()
1997 Operands.push_back(AArch64Operand::CreatePrefetch(prfop, Tok.getString(), in tryParsePrefetch()
2005 AArch64AsmParser::tryParseAdrpLabel(OperandVector &Operands) { in tryParseAdrpLabel() argument
2048 Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); in tryParseAdrpLabel()
2056 AArch64AsmParser::tryParseAdrLabel(OperandVector &Operands) { in tryParseAdrLabel() argument
2069 Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); in tryParseAdrLabel()
2076 AArch64AsmParser::tryParseFPImm(OperandVector &Operands) { in tryParseFPImm() argument
2108 Operands.push_back(AArch64Operand::CreateFPImm(Val, S, getContext())); in tryParseFPImm()
2127 Operands.push_back(AArch64Operand::CreateFPImm(Val, S, getContext())); in tryParseFPImm()
2140 AArch64AsmParser::tryParseAddSubImm(OperandVector &Operands) { in tryParseAddSubImm() argument
2164 Operands.push_back(AArch64Operand::CreateShiftedImm(Imm, ShiftAmount, S, E, in tryParseAddSubImm()
2200 Operands.push_back(AArch64Operand::CreateShiftedImm(Imm, ShiftAmount, in tryParseAddSubImm()
2231 bool AArch64AsmParser::parseCondCode(OperandVector &Operands, in parseCondCode() argument
2250 Operands.push_back( in parseCondCode()
2258 AArch64AsmParser::tryParseOptionalShiftExtend(OperandVector &Operands) { in tryParseOptionalShiftExtend() argument
2297 Operands.push_back( in tryParseOptionalShiftExtend()
2324 Operands.push_back(AArch64Operand::CreateShiftExtend( in tryParseOptionalShiftExtend()
2332 OperandVector &Operands) { in parseSysAlias() argument
2337 Operands.push_back( in parseSysAlias()
2350 Operands.push_back( \ in parseSysAlias()
2352 Operands.push_back( \ in parseSysAlias()
2354 Operands.push_back( \ in parseSysAlias()
2357 Operands.push_back( \ in parseSysAlias()
2555 if (Tok.isNot(AsmToken::Identifier) || parseRegister(Operands)) in parseSysAlias()
2578 AArch64AsmParser::tryParseBarrierOperand(OperandVector &Operands) { in tryParseBarrierOperand() argument
2605 Operands.push_back( AArch64Operand::CreateBarrier(MCE->getValue(), Name, in tryParseBarrierOperand()
2630 Operands.push_back( AArch64Operand::CreateBarrier(Opt, Tok.getString(), in tryParseBarrierOperand()
2638 AArch64AsmParser::tryParseSysReg(OperandVector &Operands) { in tryParseSysReg() argument
2664 Operands.push_back(AArch64Operand::CreateSysReg( in tryParseSysReg()
2672 bool AArch64AsmParser::tryParseVectorRegister(OperandVector &Operands) { in tryParseVectorRegister() argument
2683 Operands.push_back( in tryParseVectorRegister()
2688 Operands.push_back( in tryParseVectorRegister()
2713 Operands.push_back(AArch64Operand::CreateVectorIndex(MCE->getValue(), SIdx, in tryParseVectorRegister()
2721 bool AArch64AsmParser::parseRegister(OperandVector &Operands) { in parseRegister() argument
2725 if (!tryParseVectorRegister(Operands)) in parseRegister()
2732 Operands.push_back( in parseRegister()
2749 Operands.push_back( in parseRegister()
2751 Operands.push_back( in parseRegister()
2753 Operands.push_back( in parseRegister()
2843 bool AArch64AsmParser::parseVectorList(OperandVector &Operands) { in parseVectorList() argument
2910 Operands.push_back(AArch64Operand::CreateVectorList( in parseVectorList()
2935 Operands.push_back(AArch64Operand::CreateVectorIndex(MCE->getValue(), SIdx, in parseVectorList()
2942 AArch64AsmParser::tryParseGPR64sp0Operand(OperandVector &Operands) { in tryParseGPR64sp0Operand() argument
2959 Operands.push_back( in tryParseGPR64sp0Operand()
2980 Operands.push_back( in tryParseGPR64sp0Operand()
2987 bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode, in parseOperand() argument
2992 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); in parseOperand()
3011 Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); in parseOperand()
3016 Operands.push_back(AArch64Operand::CreateToken("[", false, Loc, in parseOperand()
3022 return parseOperand(Operands, false, false); in parseOperand()
3025 return parseVectorList(Operands); in parseOperand()
3029 return parseCondCode(Operands, invertCondCode); in parseOperand()
3032 if (!parseRegister(Operands)) in parseOperand()
3036 OperandMatchResultTy GotShift = tryParseOptionalShiftExtend(Operands); in parseOperand()
3049 Operands.push_back(AArch64Operand::CreateImm(IdVal, S, E, getContext())); in parseOperand()
3085 Operands.push_back( in parseOperand()
3087 Operands.push_back( in parseOperand()
3097 Operands.push_back(AArch64Operand::CreateImm(ImmVal, S, E, getContext())); in parseOperand()
3109 if (Operands.size() < 2 || in parseOperand()
3110 !static_cast<AArch64Operand &>(*Operands[1]).isReg()) in parseOperand()
3115 Operands[1]->getReg()); in parseOperand()
3128 Operands[0] = AArch64Operand::CreateToken("movz", false, Loc, Ctx); in parseOperand()
3129 Operands.push_back(AArch64Operand::CreateImm( in parseOperand()
3132 Operands.push_back(AArch64Operand::CreateShiftExtend(AArch64_AM::LSL, in parseOperand()
3144 Operands.push_back(AArch64Operand::CreateImm(CPLoc, S, E, Ctx)); in parseOperand()
3154 OperandVector &Operands) { in ParseInstruction() argument
3192 bool IsError = parseSysAlias(Head, NameLoc, Operands); in ParseInstruction()
3198 Operands.push_back( in ParseInstruction()
3213 Operands.push_back( in ParseInstruction()
3215 Operands.push_back( in ParseInstruction()
3226 Operands.push_back( in ParseInstruction()
3250 if (parseOperand(Operands, false, false)) { in ParseInstruction()
3260 if (parseOperand(Operands, (N == 4 && condCodeFourthOperand) || in ParseInstruction()
3278 Operands.push_back(AArch64Operand::CreateToken("]", false, Loc, in ParseInstruction()
3285 Operands.push_back(AArch64Operand::CreateToken("!", false, Loc, in ParseInstruction()
3607 OperandVector &Operands, in MatchAndEmitInstruction() argument
3611 assert(!Operands.empty() && "Unexpect empty operand list!"); in MatchAndEmitInstruction()
3612 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[0]); in MatchAndEmitInstruction()
3616 unsigned NumOperands = Operands.size(); in MatchAndEmitInstruction()
3619 AArch64Operand &Op2 = static_cast<AArch64Operand &>(*Operands[2]); in MatchAndEmitInstruction()
3620 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction()
3639 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3641 Operands.push_back(AArch64Operand::CreateImm( in MatchAndEmitInstruction()
3643 Operands[3] = AArch64Operand::CreateImm(NewOp3, Op3.getStartLoc(), in MatchAndEmitInstruction()
3651 AArch64Operand &Op1 = static_cast<AArch64Operand &>(*Operands[1]); in MatchAndEmitInstruction()
3652 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction()
3653 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction()
3694 Operands[3] = AArch64Operand::CreateImm( in MatchAndEmitInstruction()
3696 Operands[4] = AArch64Operand::CreateImm( in MatchAndEmitInstruction()
3699 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3702 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3705 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3716 AArch64Operand &Op1 = static_cast<AArch64Operand &>(*Operands[1]); in MatchAndEmitInstruction()
3717 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction()
3718 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction()
3750 Operands[4] = AArch64Operand::CreateImm( in MatchAndEmitInstruction()
3753 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3756 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3759 Operands[0] = AArch64Operand::CreateToken( in MatchAndEmitInstruction()
3773 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[2]); in MatchAndEmitInstruction()
3776 Operands[2] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(), in MatchAndEmitInstruction()
3782 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[1]); in MatchAndEmitInstruction()
3788 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[2]); in MatchAndEmitInstruction()
3791 Operands[2] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(), in MatchAndEmitInstruction()
3798 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[1]); in MatchAndEmitInstruction()
3804 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[1]); in MatchAndEmitInstruction()
3807 Operands[1] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(), in MatchAndEmitInstruction()
3815 AArch64Operand &RegOp = static_cast<AArch64Operand &>(*Operands[1]); in MatchAndEmitInstruction()
3816 AArch64Operand &ImmOp = static_cast<AArch64Operand &>(*Operands[2]); in MatchAndEmitInstruction()
3823 Operands[2] = AArch64Operand::CreateReg(zreg, false, Op.getStartLoc(), in MatchAndEmitInstruction()
3832 MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm, 1); in MatchAndEmitInstruction()
3838 MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm, 0); in MatchAndEmitInstruction()
3844 NumOperands = Operands.size(); in MatchAndEmitInstruction()
3846 OperandLocs.push_back(Operands[i]->getStartLoc()); in MatchAndEmitInstruction()
3874 if (ErrorInfo >= Operands.size()) in MatchAndEmitInstruction()
3877 ErrorLoc = ((AArch64Operand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction()
3883 if (((AArch64Operand &)*Operands[ErrorInfo]).isToken() && in MatchAndEmitInstruction()
3884 ((AArch64Operand &)*Operands[ErrorInfo]).isTokenSuffix()) in MatchAndEmitInstruction()
3936 if (ErrorInfo >= Operands.size()) in MatchAndEmitInstruction()
3940 SMLoc ErrorLoc = ((AArch64Operand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction()