Lines Matching refs:getShiftExtendAmount
404 unsigned getShiftExtendAmount() const { in getShiftExtendAmount() function in __anon26fd99540211::AArch64Operand
942 getShiftExtendAmount() <= 4; in isExtend()
958 getShiftExtendAmount() <= 4; in isExtendLSL64()
966 (getShiftExtendAmount() == Log2_32(Width / 8) || in isMemXExtend()
967 getShiftExtendAmount() == 0); in isMemXExtend()
975 (getShiftExtendAmount() == Log2_32(Width / 8) || in isMemWExtend()
976 getShiftExtendAmount() == 0); in isMemWExtend()
987 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
999 getShiftExtendAmount() < width; in isLogicalShifter()
1010 uint64_t Val = getShiftExtendAmount(); in isMovImm32Shifter()
1022 uint64_t Val = getShiftExtendAmount(); in isMovImm64Shifter()
1031 unsigned Shift = getShiftExtendAmount(); in isLogicalVecShifter()
1041 unsigned Shift = getShiftExtendAmount(); in isLogicalVecHalfWordShifter()
1051 unsigned Shift = getShiftExtendAmount(); in isMoveVecShifter()
1470 AArch64_AM::getShifterImm(getShiftExtendType(), getShiftExtendAmount()); in addShifterOperands()
1478 unsigned Imm = AArch64_AM::getArithExtendImm(ET, getShiftExtendAmount()); in addExtendOperands()
1486 unsigned Imm = AArch64_AM::getArithExtendImm(ET, getShiftExtendAmount()); in addExtend64Operands()
1495 Inst.addOperand(MCOperand::CreateImm(getShiftExtendAmount() != 0)); in addMemExtendOperands()
1738 << getShiftExtendAmount(); in print()