Lines Matching refs:OpIdx
61 uint32_t getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx,
67 uint32_t getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
73 uint32_t getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
79 uint32_t getCondBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
85 uint32_t getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx,
92 uint32_t getMemExtendOpValue(const MCInst &MI, unsigned OpIdx,
98 uint32_t getTestBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
104 uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
110 uint32_t getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx,
115 uint32_t getVecShifterOpValue(const MCInst &MI, unsigned OpIdx,
121 uint32_t getMoveVecShifterOpValue(const MCInst &MI, unsigned OpIdx,
127 uint32_t getFixedPointScaleOpValue(const MCInst &MI, unsigned OpIdx,
131 uint32_t getVecShiftR64OpValue(const MCInst &MI, unsigned OpIdx,
134 uint32_t getVecShiftR32OpValue(const MCInst &MI, unsigned OpIdx,
137 uint32_t getVecShiftR16OpValue(const MCInst &MI, unsigned OpIdx,
140 uint32_t getVecShiftR8OpValue(const MCInst &MI, unsigned OpIdx,
143 uint32_t getVecShiftL64OpValue(const MCInst &MI, unsigned OpIdx,
146 uint32_t getVecShiftL32OpValue(const MCInst &MI, unsigned OpIdx,
149 uint32_t getVecShiftL16OpValue(const MCInst &MI, unsigned OpIdx,
152 uint32_t getVecShiftL8OpValue(const MCInst &MI, unsigned OpIdx,
158 uint32_t getSIMDShift64OpValue(const MCInst &MI, unsigned OpIdx,
162 uint32_t getSIMDShift64_32OpValue(const MCInst &MI, unsigned OpIdx,
166 uint32_t getSIMDShift32OpValue(const MCInst &MI, unsigned OpIdx,
170 uint32_t getSIMDShift16OpValue(const MCInst &MI, unsigned OpIdx,
224 AArch64MCCodeEmitter::getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, in getLdStUImm12OpValue() argument
227 const MCOperand &MO = MI.getOperand(OpIdx); in getLdStUImm12OpValue()
245 AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, in getAdrLabelOpValue() argument
248 const MCOperand &MO = MI.getOperand(OpIdx); in getAdrLabelOpValue()
271 AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, in getAddSubImmOpValue() argument
275 const MCOperand &MO = MI.getOperand(OpIdx); in getAddSubImmOpValue()
276 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getAddSubImmOpValue()
299 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getCondBranchTargetOpValue() argument
301 const MCOperand &MO = MI.getOperand(OpIdx); in getCondBranchTargetOpValue()
320 AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, in getLoadLiteralOpValue() argument
323 const MCOperand &MO = MI.getOperand(OpIdx); in getLoadLiteralOpValue()
340 AArch64MCCodeEmitter::getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, in getMemExtendOpValue() argument
343 unsigned SignExtend = MI.getOperand(OpIdx).getImm(); in getMemExtendOpValue()
344 unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); in getMemExtendOpValue()
349 AArch64MCCodeEmitter::getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, in getMoveWideImmOpValue() argument
352 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveWideImmOpValue()
369 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getTestBranchTargetOpValue() argument
371 const MCOperand &MO = MI.getOperand(OpIdx); in getTestBranchTargetOpValue()
390 AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue() argument
393 const MCOperand &MO = MI.getOperand(OpIdx); in getBranchTargetOpValue()
418 AArch64MCCodeEmitter::getVecShifterOpValue(const MCInst &MI, unsigned OpIdx, in getVecShifterOpValue() argument
421 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShifterOpValue()
441 AArch64MCCodeEmitter::getSIMDShift64OpValue(const MCInst &MI, unsigned OpIdx, in getSIMDShift64OpValue() argument
444 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift64OpValue()
450 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getSIMDShift64_32OpValue() argument
452 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift64_32OpValue()
458 AArch64MCCodeEmitter::getSIMDShift32OpValue(const MCInst &MI, unsigned OpIdx, in getSIMDShift32OpValue() argument
461 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift32OpValue()
467 AArch64MCCodeEmitter::getSIMDShift16OpValue(const MCInst &MI, unsigned OpIdx, in getSIMDShift16OpValue() argument
470 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift16OpValue()
478 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getFixedPointScaleOpValue() argument
480 const MCOperand &MO = MI.getOperand(OpIdx); in getFixedPointScaleOpValue()
486 AArch64MCCodeEmitter::getVecShiftR64OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftR64OpValue() argument
489 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR64OpValue()
495 AArch64MCCodeEmitter::getVecShiftR32OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftR32OpValue() argument
498 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR32OpValue()
504 AArch64MCCodeEmitter::getVecShiftR16OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftR16OpValue() argument
507 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR16OpValue()
513 AArch64MCCodeEmitter::getVecShiftR8OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftR8OpValue() argument
516 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR8OpValue()
522 AArch64MCCodeEmitter::getVecShiftL64OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftL64OpValue() argument
525 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL64OpValue()
531 AArch64MCCodeEmitter::getVecShiftL32OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftL32OpValue() argument
534 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL32OpValue()
540 AArch64MCCodeEmitter::getVecShiftL16OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftL16OpValue() argument
543 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL16OpValue()
549 AArch64MCCodeEmitter::getVecShiftL8OpValue(const MCInst &MI, unsigned OpIdx, in getVecShiftL8OpValue() argument
552 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL8OpValue()
560 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getMoveVecShifterOpValue() argument
562 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveVecShifterOpValue()