Lines Matching refs:getImm

220   return static_cast<unsigned>(MO.getImm());  in getMachineOpValue()
231 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue()
252 return MO.getImm(); in getAdrLabelOpValue()
277 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
279 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
283 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); in getAddSubImmOpValue()
305 return MO.getImm(); in getCondBranchTargetOpValue()
327 return MO.getImm(); in getLoadLiteralOpValue()
343 unsigned SignExtend = MI.getOperand(OpIdx).getImm(); in getMemExtendOpValue()
344 unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); in getMemExtendOpValue()
355 return MO.getImm(); in getMoveWideImmOpValue()
375 return MO.getImm(); in getTestBranchTargetOpValue()
397 return MO.getImm(); in getBranchTargetOpValue()
424 switch (MO.getImm()) { in getVecShifterOpValue()
446 return 64 - (MO.getImm()); in getSIMDShift64OpValue()
454 return 64 - (MO.getImm() | 32); in getSIMDShift64_32OpValue()
463 return 32 - (MO.getImm() | 16); in getSIMDShift32OpValue()
472 return 16 - (MO.getImm() | 8); in getSIMDShift16OpValue()
482 return 64 - MO.getImm(); in getFixedPointScaleOpValue()
491 return 64 - MO.getImm(); in getVecShiftR64OpValue()
500 return 32 - MO.getImm(); in getVecShiftR32OpValue()
509 return 16 - MO.getImm(); in getVecShiftR16OpValue()
518 return 8 - MO.getImm(); in getVecShiftR8OpValue()
527 return MO.getImm() - 64; in getVecShiftL64OpValue()
536 return MO.getImm() - 32; in getVecShiftL32OpValue()
545 return MO.getImm() - 16; in getVecShiftL16OpValue()
554 return MO.getImm() - 8; in getVecShiftL8OpValue()
565 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue()