Lines Matching refs:CurReg
2048 for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded; in tryFoldSPUpdateIntoPushPop() local
2049 --CurReg) { in tryFoldSPUpdateIntoPushPop()
2054 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false, in tryFoldSPUpdateIntoPushPop()
2067 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop()
2068 isAnySubRegLive(CurReg, TRI, MI)) { in tryFoldSPUpdateIntoPushPop()
2078 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false, in tryFoldSPUpdateIntoPushPop()
4358 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local
4359 bool CurUndef = !MI->readsRegister(CurReg, TRI); in setExecutionDomain()
4360 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4362 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
4363 CurUndef = !MI->readsRegister(CurReg, TRI); in setExecutionDomain()
4364 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4377 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
4378 CurUndef = CurReg == DSrc && !MI->readsRegister(CurReg, TRI); in setExecutionDomain()
4379 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4381 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
4382 CurUndef = CurReg == DSrc && !MI->readsRegister(CurReg, TRI); in setExecutionDomain()
4383 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()