Lines Matching refs:DefAlign
3124 unsigned DefIdx, unsigned DefAlign) const { in getVLDMDefCycle()
3151 if ((isSLoad && (RegNo % 2)) || DefAlign < 8) in getVLDMDefCycle()
3165 unsigned DefIdx, unsigned DefAlign) const { in getLDMDefCycle()
3184 if ((RegNo % 2) || DefAlign < 8) in getLDMDefCycle()
3268 unsigned DefIdx, unsigned DefAlign, in getOperandLatency() argument
3293 DefCycle = getVLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency()
3314 DefCycle = getLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency()
3434 const MCInstrDesc *DefMCID, unsigned DefAlign) { in adjustDefLatency() argument
3494 if (DefAlign < 8 && Subtarget.isLikeA9()) { in adjustDefLatency()
3677 unsigned DefAlign = DefMI->hasOneMemOperand() in getOperandLatency() local
3683 int Latency = getOperandLatency(ItinData, *DefMCID, DefIdx, DefAlign, in getOperandLatency()
3693 Adj += adjustDefLatency(Subtarget, DefMI, DefMCID, DefAlign); in getOperandLatency()
3726 unsigned DefAlign = !DefMN->memoperands_empty() in getOperandLatency() local
3731 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign, in getOperandLatency()
3792 if (DefAlign < 8 && Subtarget.isLikeA9()) in getOperandLatency()
3977 unsigned DefAlign = MI->hasOneMemOperand() in getInstrLatency() local
3979 int Adj = adjustDefLatency(Subtarget, MI, &MCID, DefAlign); in getInstrLatency()