Lines Matching refs:ARM

31   static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 };  in f64AssignAPCS()
74   static const MCPhysReg HiRegList[] = { ARM::R0, ARM::R2 };  in f64AssignAAPCS()
75   static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 };  in f64AssignAAPCS()
76   static const MCPhysReg ShadowRegList[] = { ARM::R0, ARM::R1 };  in f64AssignAAPCS()
77   static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 };  in f64AssignAAPCS()
84     assert((!Reg || Reg == ARM::R3) && "Wrong GPRs usage for f64");  in f64AssignAAPCS()
126   static const MCPhysReg HiRegList[] = { ARM::R0, ARM::R2 };  in f64RetAssign()
127   static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 };  in f64RetAssign()
163 static const uint16_t RRegList[] = { ARM::R0,  ARM::R1,  ARM::R2,  ARM::R3 };
165 static const uint16_t SRegList[] = { ARM::S0,  ARM::S1,  ARM::S2,  ARM::S3,
166                                      ARM::S4,  ARM::S5,  ARM::S6,  ARM::S7,
167                                      ARM::S8,  ARM::S9,  ARM::S10, ARM::S11,
168                                      ARM::S12, ARM::S13, ARM::S14,  ARM::S15 };
169 static const uint16_t DRegList[] = { ARM::D0, ARM::D1, ARM::D2, ARM::D3,
170                                      ARM::D4, ARM::D5, ARM::D6, ARM::D7 };
171 static const uint16_t QRegList[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3 };