Lines Matching refs:VA

1895     CCValAssign &VA = ArgLocs[i];  in ProcessCallArgs()  local
1896 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1903 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1905 } else if (VA.needsCustom()) { in ProcessCallArgs()
1907 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1909 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1945 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1946 const Value *ArgVal = Args[VA.getValNo()]; in ProcessCallArgs()
1947 unsigned Arg = ArgRegs[VA.getValNo()]; in ProcessCallArgs()
1948 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1954 switch (VA.getLocInfo()) { in ProcessCallArgs()
1957 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1966 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1973 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg, in ProcessCallArgs()
1977 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1984 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1986 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(Arg); in ProcessCallArgs()
1987 RegArgs.push_back(VA.getLocReg()); in ProcessCallArgs()
1988 } else if (VA.needsCustom()) { in ProcessCallArgs()
1990 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
1995 assert(VA.isRegLoc() && NextVA.isRegLoc() && in ProcessCallArgs()
1999 TII.get(ARM::VMOVRRD), VA.getLocReg()) in ProcessCallArgs()
2002 RegArgs.push_back(VA.getLocReg()); in ProcessCallArgs()
2005 assert(VA.isMemLoc()); in ProcessCallArgs()
2015 Addr.Offset = VA.getLocMemOffset(); in ProcessCallArgs()
2111 CCValAssign &VA = ValLocs[0]; in SelectRet() local
2114 if (VA.getLocInfo() != CCValAssign::Full) in SelectRet()
2117 if (!VA.isRegLoc()) in SelectRet()
2120 unsigned SrcReg = Reg + VA.getValNo(); in SelectRet()
2124 MVT DestVT = VA.getValVT(); in SelectRet()
2141 unsigned DstReg = VA.getLocReg(); in SelectRet()
2150 RetRegs.push_back(VA.getLocReg()); in SelectRet()