Lines Matching refs:createResultReg
289 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r()
312 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()
341 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rrr()
372 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri()
399 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rri()
427 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i()
448 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg()
458 unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg()
484 unsigned DestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeFP()
500 unsigned DestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeFP()
523 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt()
539 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt()
565 ResultReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeInt()
589 unsigned DestReg = createResultReg(RC); in ARMMaterializeGV()
655 unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeGV()
669 unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeGV()
721 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca()
895 unsigned ResultReg = createResultReg(RC); in ARMSimplifyAddress()
1046 ResultReg = createResultReg(RC); in ARMEmitLoad()
1055 unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in ARMEmitLoad()
1093 unsigned Res = createResultReg(isThumb2 ? &ARM::tGPRRegClass in ARMEmitStore()
1143 unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32)); in ARMEmitStore()
1500 unsigned DestReg = createResultReg(RC); in SelectCmp()
1523 unsigned Result = createResultReg(&ARM::DPRRegClass); in SelectFPExt()
1542 unsigned Result = createResultReg(&ARM::SPRRegClass); in SelectFPTrunc()
1587 unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT)); in SelectIToFP()
1613 unsigned ResultReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in SelectFPToI()
1679 unsigned ResultReg = createResultReg(RC); in SelectSelect()
1782 unsigned ResultReg = createResultReg(&ARM::GPRnopcRegClass); in SelectBinaryIntOp()
1826 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); in SelectBinaryFPOp()
2046 unsigned ResultReg = createResultReg(DstRC); in FinishCall()
2067 unsigned ResultReg = createResultReg(DstRC); in FinishCall()
2504 DestReg = createResultReg(RC); in SelectIntrinsicCall()
2708 ResultReg = createResultReg(RC); in ARMEmitIntExt()
2790 unsigned ResultReg = createResultReg(&ARM::GPRnopcRegClass); in SelectShift()
2950 unsigned DestReg1 = createResultReg(TLI.getRegClassFor(VT)); in ARMLowerPICELF()
2973 unsigned DestReg2 = createResultReg(TLI.getRegClassFor(VT)); in ARMLowerPICELF()
3051 unsigned ResultReg = createResultReg(RC); in fastLowerArguments()